參數(shù)資料
型號: 2064VL
廠商: Lattice Semiconductor Corporation
英文描述: 2.5V In-System Programmable SuperFAST⑩ High Density PLD
中文描述: 2.5V的在系統(tǒng)可編程超快⑩高密度可編程邏輯器件
文件頁數(shù): 8/14頁
文件大?。?/td> 188K
代理商: 2064VL
8
Specifications
ispLSI 2064VL
Power Consumption
Power consumption in the ispLSI 2064VL device de-
pends on two primary factors: the speed at which the
device is operating and the number of Product Terms
used. Figure 3 shows the relationship between power
and operating speed.
Figure 3. Typical Device Power Consumption vs fmax
0127/2064VL
ICC can be estimated for the ispLSI 2064VL using the following equation:
ICC(mA) = 8 + (# of PTs * 0.42) + (# of Nets * Max. Freq. * 0.0025)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 2.5V, room temperature) and an assumption of two GLB
loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to operating
conditions and the program in the device, the actual ICC should be verified.
Notes: Configuration of four 16-bit counters
Typical current at 2.5V, 25
°
C
60
0
30
60
90
120
150
180
f
max (MHz)
I
C
80
100
20
0
40
ispLSI 2064VL
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