參數(shù)資料
型號: 2064VL
廠商: Lattice Semiconductor Corporation
英文描述: 2.5V In-System Programmable SuperFAST⑩ High Density PLD
中文描述: 2.5V的在系統(tǒng)可編程超快⑩高密度可編程邏輯器件
文件頁數(shù): 9/14頁
文件大小: 188K
代理商: 2064VL
9
Specifications
ispLSI 2064VL
32-I/O Signal Descriptions
GOE 0/IN 3
This pin performs one of two functions. It can be programmed to function as a Global Output Enable
pin or a Dedicated Input pin.
This pin performs one of two functions. It can be programmed to function as a Global Output Enable or
a Dedicated Clock input. This clock input is connected to one of the clock inputs of all GLBs on the
device.
This pin performs two functions: (1) Dedicated clock input. This clock input is brought into the Clock
Distribution Network and can optionally be routed to any GLB and/or I/O cell on the device. (2) Active
Low (0) Reset pin which resets all of the registers in the device.
Input
Dedicated in-system programming Boundary Scan Enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as an input pin to load
programming data into the device. TDI/IN0 is also used as one of the two control pins for the ISP State
Machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as a pin to control the
operation of the ISP State Machine. When
BSCAN
is high, it functions as a dedicated input pin.
Output/Input
This pin performs two functions. When
BSCAN
is logic low, it functions as an output pin
pin to read serial shift register data. When
BSCAN
is high, it functions as a dedicated input pin.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as a clock pin for the
Serial Shift Register. When
BSCAN
is high, it functions as a dedicated clock input. This clock input is
brought into the Clock Distribution Network and can optionally be routed to any GLB and/or I/O cell on
the device.
Ground (GND)
Vcc
No Connect
Input/Output pins
These are the general purpose I/O pins used by the logic array.
GOE 1/Y0
RESET
/Y1
BSCAN
TDI/IN 0
TMS/IN 2
TDO/IN 1
TCK/Y2
GND
VCC
NC
1
I/O
64-I/O Signal Descriptions
RESET
GOE 0, GOE1
Y0, Y1, Y2
Active Low (0) Reset pin resets all the registers in the device.
Global Output Enable input pins.
Dedicated Clock Input
These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
Input
Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as an input pin to load
programming data into the device. When
BSCAN
is high, it functions as a dedicated input pin.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as a clock pin for the
Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as a mode control pin for
the Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Output/Input
This pin performs two functions. When
BSCAN
is logic low, it functions as an output pin
to read serial shift register data. When
BSCAN
is high, it functions as a dedicated input pin.
Ground (GND)
Vcc
No Connect
Input/Output Pins
These are the general purpose I/O pins used by the logic array.
1. NC pins are not to be connected to any active signals, VCC or GND.
BSCAN
TDI/IN 0
TCK/IN 3
TMS/IN 1
TDO/IN 2
GND
VCC
NC
1
I/O
Signal Name Description
Signal Name Description
1. NC pins are not to be connected to any active signals, VCC or GND.
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