參數(shù)資料
型號: 24C02SC
廠商: Microchip Technology Inc.
英文描述: 2K 5.0V IIC serial EEPROMs(2.5V~5.5V,2K位,1M次擦寫周期,ISO7816標(biāo)準(zhǔn))
中文描述: 2K 5.0V國際進(jìn)口電壓(2.5V?5.5V的和2K位,100萬次擦寫周期,符合ISO7816標(biāo)準(zhǔn)串行EEPROM)
文件頁數(shù): 24/170頁
文件大?。?/td> 4191K
代理商: 24C02SC
PIC16F62X
DS40300C-page 22
Preliminary
2003 Microchip Technology Inc.
3.2.2.4
PIE1 Register
This register contains interrupt enable bits.
REGISTER 3-4:
PIE1 REGISTER (ADDRESS: 8Ch)
R/W-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
EEIE
CMIE
RCIE
TXIE
CCP1IE
TMR2IE
TMR1IE
bit 7
bit 0
bit 7
EEIE:
EE Write Complete Interrupt Enable Bit
1
= Enables the EE write complete interrupt
0
= Disables the EE write complete interrupt
bit 6
CMIE
: Comparator Interrupt Enable bit
1
= Enables the comparator interrupt
0
= Disables the comparator interrupt
bit 5
RCIE
: USART Receive Interrupt Enable bit
1
= Enables the USART receive interrupt
0
= Disables the USART receive interrupt
bit 4
TXIE
: USART Transmit Interrupt Enable bit
1
= Enables the USART transmit interrupt
0
= Disables the USART transmit interrupt
bit 3
Unimplemented
: Read as ‘0’
bit 2
CCP1IE
: CCP1 Interrupt Enable bit
1
= Enables the CCP1 interrupt
0
= Disables the CCP1 interrupt
bit 1
TMR2IE
: TMR2 to PR2 Match Interrupt Enable bit
1
= Enables the TMR2 to PR2 match interrupt
0
= Disables the TMR2 to PR2 match interrupt
bit 0
TMR1IE
: TMR1 Overflow Interrupt Enable bit
1
= Enables the TMR1 overflow interrupt
0
= Disables the TMR1 overflow interrupt
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
相關(guān)PDF資料
PDF描述
24C02A 2K 5.0V CMOS serial EEPROMs(2K位,5.0V,IIC串行EEPROM)
24C02C 2K 5.0V IIC serial EEPROMs(2K位,1M次擦寫周期,硬件寫保護(hù),二線串行接口,EEPROM)
24C02C-EP 2K 5.0V I 2 C ⑩ Serial EEPROM
24C02C-ESN 2K 5.0V I 2 C ⑩ Serial EEPROM
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