參數(shù)資料
型號(hào): 24C02SC
廠商: Microchip Technology Inc.
英文描述: 2K 5.0V IIC serial EEPROMs(2.5V~5.5V,2K位,1M次擦寫周期,ISO7816標(biāo)準(zhǔn))
中文描述: 2K 5.0V國(guó)際進(jìn)口電壓(2.5V?5.5V的和2K位,100萬(wàn)次擦寫周期,符合ISO7816標(biāo)準(zhǔn)串行EEPROM)
文件頁(yè)數(shù): 57/170頁(yè)
文件大?。?/td> 4191K
代理商: 24C02SC
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)當(dāng)前第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 55
PIC16F62X
The code example in Example 9-1 depicts the steps
required to configure the Comparator module. RA3 and
RA4 are configured as digital output. RA0 and RA1 are
configured as the V- inputs and RA2 as the V+ input to
both comparators.
EXAMPLE 9-1:
INITIALIZING
COMPARATOR MODULE
9.2
Comparator Operation
A single comparator is shown in Figure 9-2 along with
the relationship between the analog input levels and
the digital output. When the analog input at V
IN
+ is less
than the analog input V
IN
-, the output of the comparator
is a digital low level. When the analog input at V
IN
+ is
greater than the analog input V
IN
-, the output of the
comparator is a digital high level. The shaded areas of
the output of the comparator in Figure 9-2 represent
the uncertainty due to input offsets and response time.
9.3
Comparator Reference
An external or internal reference signal may be used
depending on the Comparator Operating mode. The
analog signal that is present at V
IN
- is compared to the
signal at V
IN
+, and the digital output of the comparator
is adjusted accordingly (Figure 9-2).
FIGURE 9-2:
SINGLE COMPARATOR
9.3.1
EXTERNAL REFERENCE SIGNAL
When external voltage references are used, the
comparator module can be configured to have the
comparators operate from the same or different
reference sources. However, threshold detector
applications may require the same reference. The
reference signal must be between V
SS
and V
DD
, and
can be applied to either pin of the comparator(s).
9.3.2
INTERNAL REFERENCE SIGNAL
The Comparator module also allows the selection of an
internally generated voltage reference for the
comparators. Section 10.0, Voltage Reference Manual,
contains a detailed description of the Voltage Refer-
ence module that provides this signal. The internal
reference signal is used when the comparators are in
mode CM<2:0>=010 (Figure 9-1). In this mode, the
internal voltage reference is applied to the V
IN
+ pin of
both comparators.
9.4
Comparator Response Time
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output is ensured to have a valid level. If
the internal reference is changed, the maximum delay
of the internal voltage reference must be considered
when using the comparator outputs. Otherwise the
maximum delay of the comparators should be used
(Table 17-1
).
FLAG_REG EQU
CLRF
CLRF
MOVF
ANDLW
IORWF
MOVLW
MOVWF
BSF
MOVLW
MOVWF
0X20
;Init flag register
;Init PORTA
;Load comparator bits
;Mask comparator bits
;Store bits in flag register
;Init comparator mode
;CM<2:0> = 011
;Select Bank1
;Initialize data direction
;Set RA<2:0> as inputs
;RA<4:3> as outputs
;TRISA<7:5> always read ‘0’
;Select Bank 0
;10
μ
s delay
;Rea
d
CMCO
N
t
o
en
d
chang
e
condition
;Clear pending interrupts
;Select Bank 1
;Enable comparator interrupts
;Select Bank 0
INTCON,PEIE ;Enable peripheral interrupts
INTCON,GIE
;Global interrupt enable
FLAG_REG
PORTA
CMCON, W
0xC0
FLAG_REG,F
0x03
CMCON
STATUS,RP0
0x07
TRISA
BCF
CALL
MOVF
BCF
BSF
BSF
BCF
BSF
BSF
STATUS,RP0
DELAY10
CMCON,F
PIR1,CMIF
STATUS,RP0
PIE1,CMIE
STATUS,RP0
+
Vi
N
+
V
IN
-
Result
Result
V
IN
-
V
IN
+
相關(guān)PDF資料
PDF描述
24C02A 2K 5.0V CMOS serial EEPROMs(2K位,5.0V,IIC串行EEPROM)
24C02C 2K 5.0V IIC serial EEPROMs(2K位,1M次擦寫周期,硬件寫保護(hù),二線串行接口,EEPROM)
24C02C-EP 2K 5.0V I 2 C ⑩ Serial EEPROM
24C02C-ESN 2K 5.0V I 2 C ⑩ Serial EEPROM
24C02C-EST 2K 5.0V I 2 C ⑩ Serial EEPROM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
24C02SC/S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|256X8|CMOS|DIE
24C02SC-/S 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K 5.0V I2C Serial EEPROMs for Smart Cards
24C02SC/S08 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|256X8|CMOS|DIE
24C02SC-/S08 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K 5.0V I2C Serial EEPROMs for Smart Cards
24C02SC/W 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|256X8|CMOS|WAFER