2004 Microchip Technology Inc.
DS21191M-page 1
24AA128/24LC128/24FC128
128K I
2
C
CMOS Serial EEPROM
Device Selection Table
Features
Low-power CMOS technology:
- Maximum write current 3 mA at 5.5V
- Maximum read current 400
μ
A at 5.5V
- Standby current 100 nA typical at 5.5V
2-wire serial interface bus, I
2
C compatible
Cascadable for up to eight devices
Self-timed erase/write cycle
64-byte Page Write mode available
5 ms max write cycle time
Hardware write-protect for entire array
Output slope control to eliminate ground bounce
Schmitt Trigger inputs for noise suppression
1,000,000 erase/write cycles
Electrostatic discharge protection > 4000V
Data retention > 200 years
8-pin PDIP, SOIC, TSSOP, MSOP and DFN
packages, 14-lead TSSOP package
Standard and Pb-free finishes available
Temperature ranges:
- Industrial (I):
-40
°
C to +85
°
C
- Automotive (E):
-40
°
C to +125
°
C
Description
The Microchip Technology Inc. 24AA128/24LC128/
24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial
Electrically Erasable PROM (EEPROM), capable of
operation across a broad voltage range (1.8V to 5.5V).
It has been developed for advanced, low-power
applications such as personal communications or data
acquisition. This device also has a page write capabil-
ity of up to 64 bytes of data. This device is capable of
both random and sequential reads up to the 128K
boundary. Functional address lines allow up to eight
devices on the same bus, for up to 1 Mbit address
space. This device is available in the standard 8-pin
plastic DIP, SOIC (150 and 208 mil), TSSOP, MSOP,
DFN and 14-lead TSSOP packages.
Block Diagram
Package Types
*24XX128 is used in this document as a generic part number for the 24AA128/24LC128/24FC128 devices.
Part
Number
V
CC
Range
Max. Clock
Frequency
Temp.
Ranges
24AA128
1.8-5.5V
400 kHz
(1)
I
24LC128
24FC128
Note 1:
2.5-5.5V
1.8-5.5V
100 kHz for V
CC
< 2.5V.
400 kHz for V
CC
< 2.5V.
400 kHz
1 MHz
(2)
I, E
I
2:
HV Generator
EEPROM
Array
Page Latches
YDEC
XDEC
Sense Amp.
R/W Control
M
emory
C
ontrol
L
ogic
I/O
C
ontrol
L
ogic
I/O
A0 A1 A2
SDA
SCL
V
CC
V
SS
WP
A0
A1
A2
V
SS
V
CC
WP
SCL
SDA
1
2
3
4
8
7
6
5
2
PDIP/SOIC
TSSOP/MSOP *
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
TSSOP
2
DFN
A0
A1
A2
V
SS
WP
SCL
SDA
2
5
6
7
8
4
3
2
1
V
CC
NC
NC
NC
A0
A1
A2
V
SS
NC
NC
NC
V
CC
WP
SCL
SDA
2
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Note: *
Pins A0 and A1 are no-connects for the MSOP package only.