參數(shù)資料
型號: 24FC128
廠商: Microchip Technology Inc.
元件分類: EEPROM
英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
中文描述: 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS
文件頁數(shù): 3/26頁
文件大?。?/td> 450K
代理商: 24FC128
2004 Microchip Technology Inc.
DS21191M-page 3
24AA128/24LC128/24FC128
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
Automotive (E):
V
CC
= +1.8V to 5.5V
V
CC
= +2.5V to 5.5V
T
A
= -40°C to +85°C
T
A
= -40°C to 125°C
Param.
No.
Sym.
Characteristic
Min.
Max.
Units
Conditions
1
F
CLK
Clock frequency
100
400
400
1000
1000
300
300
300
100
kHz
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V 24FC128
2.5V
V
CC
5.5V 24FC128
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V 24FC128
2.5V
V
CC
5.5V 24FC128
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V 24FC128
2.5V
V
CC
5.5V 24FC128
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
5.5V 24FC128
All except, 24FC128
1.8V
V
CC
5.5V 24FC128
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V 24FC128
2.5V
V
CC
5.5V 24FC128
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
<
2.5V 24FC128
2.5V
V
CC
5.5V 24FC128
(Note 2)
2
T
HIGH
Clock high time
4000
600
600
500
4700
1300
1300
500
4000
600
600
250
4700
600
600
250
0
ns
3
T
LOW
Clock low time
ns
4
T
R
SDA and SCL rise time
(Note 1)
ns
5
T
F
SDA and SCL fall time
(Note 1)
Start condition hold time
ns
6
T
HD
:
ST
A
ns
7
T
SU
:
ST
A
Start condition setup time
ns
8
T
HD
:
DA
T
T
SU
:
DA
T
Data input hold time
ns
9
Data input setup time
250
100
100
4000
600
600
250
4000
600
600
ns
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
5.5V 24FC128
1.8 V
V
CC
<
2.5V
2.5 V
V
CC
5.5V
1.8V
V
CC
<
2.5V 24FC128
2.5 V
V
CC
5.5V 24FC128
1.8V
V
CC
<
2.5V
2.5V
V
CC
5.5V
1.8V
V
CC
5.5V 24FC128
10
T
SU
:
ST
O
Stop condition setup time
ns
11
T
SU
:
WP
WP setup time
ns
Note 1:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3:
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a T
I
specification for standard operation.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance Model, which can be obtained from Microchip’s web site:
www.microchip.com.
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