參數(shù)資料
型號: 24FC65-ISM
廠商: Microchip Technology Inc.
英文描述: 64K 5.0V 1 MHz I 2 C Smart Serial EEPROM
中文描述: 64K的5.0V 1兆赫的I 2 C串行EEPROM智能
文件頁數(shù): 11/16頁
文件大?。?/td> 140K
代理商: 24FC65-ISM
1996 Microchip Technology Inc.
DS21125B-page 11
24FC65
8.0
PIN DESCRIPTIONS
8.1
A0, A1, A2 Chip Address Inputs
The A0..A2 inputs are used by the 24FC65 for multiple
device operation and conform to the two-wire bus
standard. The levels applied to these pins define the
address block occupied by the device in the address
map. A particular device is selected by transmitting the
corresponding bits (A2, A1, A0) in the control byte
(Figure 3-2 and Figure 8-1).
8.2
SDA Serial Address/Data Input/Output
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pullup
resistor to V
CC
(typical 1K
,
must consider total bus
capacitance and maximum rise/fall times).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOPs.
8.3
SCL Serial Clock
This input is used to synchronize the data transfer from
and to the device.
FIGURE 8-1:
CONTROL SEQUENCE BIT ASSIGNMENTS
R X XB
3
B
2
B
1
B
0
S 0 0A
12
A
11
A
10
A
9
A
8
CONTROL
BYTE
ADDRESS
BYTE 0
1 0 1 0A
2
A
1
A
0
R
W
A
7
A
0
ADDRESS
BYTE 1
CONFIGURATION
BYTE
Slave
Address
Device
Select
Bits
Block
Count
S/HE
Acknowledges from Device
S
to
p
S
ta
t
A
K
Data from Device
1 0 1 0A
2
A
1
A
00 C
A
C
K
A
C
K
A
C
K
1 X X X X X X X
X X X X X X X X
1 1 X X X X X X
1 1 1 1B
3
B
2
B
1
B
0
C
A
3
N
2
N
1
N
0
Data from Device
S/HE
Starting Block
Number
Number of
Blocks to
Protect
No
ACK
Acknowledge
from Master
Security Read
R
Acknowledges from Device
S
to
p
S
ta
t
A
K
1 0 1 0A
2
A
1
A
00 C
A
C
K
A
C
K
S/HE
A
C
K
1 X X
X
X X X X X X X X
1 0 X XN
3
N
2
N
1
N
0
Security Write
B
3
B
2
B
1
B
0
R
Starting Block
Number
Number of
Blocks to
Protect
Acknowledges from Device
S
to
p
S
ta
t
A
K
Data from Device
1 0 1 0A
2
A
1
A
00 C
A
C
K
A
C
K
S/HE
A
C
K
1 X X X X X X X
X X X X X X X X
0 1 X X X X X X
1 1 1 1B
3
B
2
B
1
B
0
A
C
K
High Endurance
Block Number
No
ACK
High Endurance Block Read
R
Acknowledges from Device
S
to
p
S
ta
t
A
K
1 0 1 0A
2
A
1
A
00 C
A
C
K
A
C
K
A
C
K
1 X X
X
X X X X X X X X
0 0 X X 0 0 0 0
B
3
B
2
B
1
B
0
S/HE
High Endurance Block Write
R
High Endurance
Block Number
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