參數(shù)資料
型號(hào): 28C256
英文描述: 32K-Bit Parallel E2PROM
中文描述: 32K的位并行E2PROM的
文件頁(yè)數(shù): 5/24頁(yè)
文件大?。?/td> 113K
代理商: 28C256
X28C256
5
THE TOGGLE BIT I/O
6
Figure 4. Toggle Bit Bus Sequence
CE
OE
WE
I/O6
X28C256
READY
VOH
VOL
LAST
WRITE
HIGH Z
* Beginning and ending state of I/O6 will vary.
*
*
3855 FHD F14
Figure 5. Toggle Bit Software Flow
3855 FHD F15
The Toggle Bit can eliminate the software housekeeping
chore of saving and fetching the last address and data
written to a device in order to implement
DATA
Polling.
This can be especially helpful in an array comprised of
multiple X28C256 memories that is frequently updated.
The timing diagram in Figure 4 illustrates the sequence
of events on the bus. The software flow diagram in
Figure 5 illustrates a method for polling the Toggle Bit.
LOAD ACCUM
FROM ADDR n
COMPARE
ACCUM WITH
ADDR n
X28C256
READY
COMPARE
OK
NO
YES
LAST WRITE
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