參數(shù)資料
型號: 28C256
英文描述: 32K-Bit Parallel E2PROM
中文描述: 32K的位并行E2PROM的
文件頁數(shù): 7/24頁
文件大小: 113K
代理商: 28C256
X28C256
7
SOFTWARE DATA PROTECTION
Figure 6. Timing Sequence—Byte or Page Write
3855 FHD F16
Figure 7. Write Sequence for
Software Data Protection
WRITE LAST
BYTE TO
LAST ADDRESS
WRITE DATA 55
TO ADDRESS
2AAA
WRITE DATA A0
TO ADDRESS
5555
WRITE DATA XX
TO ANY
ADDRESS
AFTER tWC
RE-ENTERS DATA
PROTECTED STATE
WRITE DATA AA
TO ADDRESS
5555
BYTE/PAGE
LOAD ENABLED
3855 FHD F17
Regardless of whether the device has previously been
protected or not, once the software data protection
algorithm is used and data has been written, the X28C256
will automatically disable further writes unless another
command is issued to cancel it. If no further commands
are issued the X28C256 will be write protected during
power-down and after any subsequent power-up.
Note:
Once nitiated, the sequence of write operations
should not be interrupted.
CE
WE
(VCC)
WRITE
PROTECTED
VCC
0V
DATA
ADDR.
AA
5555
55
2AAA
A0
5555
WRITES
OK
BYTE
OR
PAGE
tWC
tBLC MAX
tWPH2
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