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參數(shù)資料
| 型號(hào)： | 3D3215Z-6 |
| 元件分類： | 復(fù)位半導(dǎo)體 |
| 英文描述： | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 中文描述： | 延遲線 |
| 文件頁(yè)數(shù)： | 3/4頁(yè) |
| 文件大?。?/td> | 32K |
| 代理商： | 3D3215Z-6 |
3D3215
Doc #01014
12/3/01
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
APPLICATION NOTES (CONT’D)
identification, the part number will include a
custom reference designator identifying the
intended frequency and duty cycle of operation.
The programmed delay accuracy of the device is
guaranteed, therefore, only for the user specified
input characteristics. Small input pulse width
variation about the selected pulse width will only
marginally impact the programmed delay
accuracy, if at all.
Nevertheless, it is strongly
recommended that the engineering staff at
DATA DELAY DEVICES be consulted.
POWER SUPPLY AND
TEMPERATURE CONSIDERATIONS
The delay of CMOS integrated circuits is strongly
dependent on power supply and temperature.
The monolithic 3D3215 delay line utilizes novel
and innovative compensation circuitry to minimize
the delay variations induced by fluctuations in
power supply and/or temperature.
The thermal coefficient is reduced to 200 PPM/C,
which is equivalent to a variation, over the 0C-
70C operating range, of
±
1% or 0.25ns
(whichever is greater) from the 25C delay
settings. The power supply coefficient is reduced,
over the 3.0V-3.6V operating range, to
±
1% or
1ns (whichever is greater) of the delay settings at
the nominal 3.3VDC power supply.
The temperature and power supply sensitivities
are based on the measured delay of Tap 5 with
respect to Tap 1. The sensitivity of the Input-to-
Tap 1 delay will be somewhat higher, particularly
with the smaller dash numbers.
It is essential that the power supply pin be
adequately bypassed and filtered. In addition,
the power bus should be of as low an
impedance construction as possible. Power
planes are preferred.
DEVICE SPECIFICATIONS
TABLE 2: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Input Pin Current
Storage Temperature
Lead Temperature
SYMBOL
V
DD
V
IN
I
IN
T
STRG
T
LEAD
MIN
-0.3
-0.3
-1.0
-55
MAX
7.0
V
DD
+0.3
1.0
150
300
UNITS
V
V
mA
C
C
NOTES
25C
10 sec
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 3.0V to 3.6V)
PARAMETER
Static Supply Current*
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
High Level Output Current
SYMBOL
I
DD
V
IH
V
IL
I
IH
I
IL
I
OH
MIN
TYP
1.3
MAX
2.0
UNITS
mA
V
V
μ
A
μ
A
mA
NOTES
V
DD
= 3.6V
2.0
0.8
0.1
0.1
-6.0
-0.1
-0.1
0.0
0.0
-8.0
V
IH
= V
DD
V
IL
= 0V
V
DD
= 3.0V
V
OH
= 2.4V
V
DD
= 3.0V
V
OL
= 0.4V
C
LD
= 5 pf
Low Level Output Current
I
OL
6.0
7.5
mA
Output Rise & Fall Time
T
R
& T
F
2
ns
*I
DD
(Dynamic) = 5 * C
LD
* V
DD
* F
where:
C
LD
= Average capacitance load/tap (pf)
F = Input frequency (GHz)
Input Capacitance = 10 pf typical
Output Load Capacitance (C
LD
) = 25 pf max
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 3D3215 | MONOLITHIC 5-TAP 3.3V FIXED DELAY LINE |
| 3D3215SERIES | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 3D3428 | MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE |
| 3D3428-0.25 | MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE |
| 3D3428-0.5 | MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 3D3215Z-60 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
| 3D3215Z-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Delay Line |
| 3D3220 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D3220) |
| 3D3220-.75 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D3220) |
| 3D3220_06 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:MONOLITHIC 10-TAP FIXED DELAY LINE |
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