參數(shù)資料
型號: 405EZ
廠商: Applied Micro Circuits Corp.
英文描述: PowerPC 405EZ Embedded Processor
中文描述: 嵌入式處理器的PowerPC 405EZ
文件頁數(shù): 33/54頁
文件大?。?/td> 362K
代理商: 405EZ
PPC405EZ – PowerPC 405EZ Embedded Processor
Revision 1.27 - August 22, 2007
AMCC Proprietary
39
Preliminary Data Sheet
UART Peripheral Interface
UART0_CTS
Clear to send.
I
3.3V LVTTL
UART0_DCD
Data carrier detect.
I
3.3V LVTTL
UART0_DSR
Data set ready.
I
3.3V LVTTL
UART0_DTR
Data terminal ready.
O
3.3V LVTTL
UART0_RI
Ring indicator.
I
3.3V LVTTL
UART0_RTS
Request to send.
O
3.3V LVTTL
UART0_Rx
Receive data.
I
3.3V LVTTL
5
UART0_Tx
Transmit data.
O
3.3V LVTTL
UART1_Rx
Receive data
I
3.3V LVTTL
5
UART1_Tx
Transmit data
O
3.3V LVTTL
USB Interface
USB1FClk
48 MHz clock for USB
I
3.3V LVTTL
USB1DEV0
Device differential + data signal
I/O
5V tolerant
USB Diff
USB1DEV0
Device differential
data signal
I/O
5V tolerant
USB Diff
USB1HOST0
Host 0 differential + data signal
I/O
5V tolerant
USB Diff
USB1HOST0
Host 0 differential
data signal
I/O
5V tolerant
USB Diff
USB1HOST1
Host 1 differential + data signal
I/O
5V tolerant
USB Diff
USB1HOST1
Host 1 differential
data signal
I/O
5V tolerant
USB Diff
Table 6. Signal Functional Description (Sheet 5 of 6)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
Signal Name
Description
I/O
Type
Notes
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