參數(shù)資料
型號(hào): 514JACXXXXXXAAG
廠商: SILICON LABORATORIES
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 125 MHz, OTHER CLOCK GENERATOR, PDSO6
封裝: 5 X 7 MM, ROHS COMPILANT PACKAGE-6
文件頁數(shù): 11/32頁
文件大?。?/td> 267K
代理商: 514JACXXXXXXAAG
Si514
Preliminary Rev. 0.9
19
Register 9.
Bit
7
65
43
2
1
0
Name
M_Int[8:3]
Type
R/W
Default
Varies
Bit
Name
Function
7:6
Reserved
5:0
M_Int[8:3]
Integer part of feedback divider M that sets the output frequency. Frequency updates
take effect when M_Int[8:3] is written.
Register 10.
Bit
765
4321
0
Name
HS_DIV[7:0]
Type
R/W
Default
Varies
Bit
Name
Function
7:0
HS_DIV[7:0]
Integer divider that divides VCO frequency and provides output to LS_DIV. Follow the
large frequency change procedure when updating. The allowed values are even num-
bers in the range from 10 to 1022 (i.e., 10, 12, 14, 16, ...., 1022). The decimal value
represents the actual divide value (i.e. 12 means divide-by-12).
相關(guān)PDF資料
PDF描述
514JBAXXXXXXAAG 250 MHz, OTHER CLOCK GENERATOR, PDSO6
514JBCXXXXXXAAG 125 MHz, OTHER CLOCK GENERATOR, PDSO6
514JBCXXXXXXBAGR 125 MHz, OTHER CLOCK GENERATOR, PDSO6
514JBCXXXXXXBAG 125 MHz, OTHER CLOCK GENERATOR, PDSO6
514JCBXXXXXXAAGR 170 MHz, OTHER CLOCK GENERATOR, PDSO6
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