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參數(shù)資料
| 型號： | 5962-8967601XX |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CQCC44 |
| 封裝： | CERAMIC, LCC-44 |
| 文件頁數(shù)： | 23/35頁 |
| 文件大?。?/td> | 3744K |
| 代理商： | 5962-8967601XX |
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MAX5723/MAX5724/MAX5725
Ultra-Small, Octal-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and SPI Interface
3
Maxim Integrated
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 2.7V to 5.5V, VDDIO = 1.8V to 5.5V, VGND = 0V, CL = 200pF, RL = 2kI, TA = -40NC to +125NC, unless otherwise noted.)
(Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Zero-Scale Error
0
+10
mV
Full-Scale Error
With respect to VREF
-0.5
+0.5
%FS
DAC OUTPUT CHARACTERISTICS
Output Voltage Range (Note 7)
No load
0
VDD
V
2kI load to GND
0
VDD -
0.2
2kI load to VDD
0.2
VDD
Load Regulation
VOUT = VFS/2
VDD = 3V Q10%,
|IOUT| P 5mA
300
F
V/mA
VDD = 5V Q10%,
|IOUT| P 10mA
300
DC Output Impedance
VOUT = VFS/2
VDD = 3V Q10%,
|IOUT| P 5mA
0.3
I
VDD = 5V Q10%,
|IOUT| P 10mA
0.3
Maximum Capacitive Load
Handling
CL
500
pF
Resistive Load Handling
RL
2
kI
Short-Circuit Output Current
VDD = 5.5V
Sourcing (output
shorted to GND)
30
mA
Sinking (output shorted
to VDD)
50
DC Power-Supply Rejection
VDD = 3V Q10% or 5V Q10%
100
F
V/V
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate
SR
Positive and negative
1.0
V/Fs
Voltage-Output Settling Time
scale to scale, to P 1 LSB, MAX5723
2.2
F
s
scale to scale, to P 1 LSB, MAX5724
2.6
scale to scale, to P 1 LSB, MAX5725
4.5
DAC Glitch Impulse
Major code transition (code x7FF to x800)
7
nV*s
Channel-to-Channel
Feedthrough (Note 8)
Internal reference
3.3
nV*s
External reference
4.07
Digital Feedthrough
Midscale code, all digital inputs from 0V to
VDDIO
0.2
nV*s
Power-Up Time
Startup calibration time (Note 9)
200
F
s
From power-down
50
F
s
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