參數資料
型號: 5962-8967901QX
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, CDIP40
封裝: CERAMIC, DIP-40
文件頁數: 15/30頁
文件大小: 4271K
代理商: 5962-8967901QX
MAX5813/MAX5814/MAX5815
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I2C Interface
22
Maxim Integrated
Table
5.
I
2 C
Commands
Summary
COMMAND
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
DESCRIPTION
DAC
COMMANDS
CODEn
0
DAC
SELECTION
CODE
REGISTER
DATA
[11:4]
CODE
REGISTER
DATA
[3:0]
X
Writes
data
to
the
selected
CODE
register(s)
LOADn
0
1
DAC
SELECTION
X
Transfers
data
from
the
selected
CODE
register(s)
to
the
selected
DAC
register(s)
CODEn_
LOAD_ALL
0
1
0
DAC
SELECTION
CODE
REGISTER
DATA
[11:4]
CODE
REGISTER
DATA
[3:0]
X
Simultaneously
writes
data
to
the
selected
CODE
register(s)
while
updating
all
DAC
registers
CODEn_
LOADn
0
1
DAC
SELECTION
CODE
REGISTER
DATA
[11:4]
CODE
REGISTER
DATA
[3:0]
X
Simultaneously
writes
data
to
the
selected
CODE
register(s)
while
updating
selected
DAC
register(s)
CONFIGURATION
COMMANDS
POWER
0
1
0
Power
Mode
00
=
Normal
01
=
PD
1k
I
10
=
PD
100k
I
11
=
PD
Hi-Z
X
DAC
D
DAC
C
DAC
B
DAC
A
X
Sets
the
power
mode
of
the
selected
DACs
(DACs
selected
with
a
1
in
the
corresponding
DACn
bit
are
updated,
DACs
with
a0
in
the
corresponding
DACn
bit
are
not
impacted)
SW_CLEAR
0
1
0
1
0
X
Executes
a
software
clear
(all
CODE
and
DAC
registers
cleared
to
their
default
values)
SW_RESET
0
1
0
1
0
1
X
Executes
a
software
reset
(all
CODE,
DAC,
and
control
registers
returned
to
their
default
values)
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