參數(shù)資料
型號(hào)： 5962-9688601QRX
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20
封裝： CERAMIC, DIP-20
文件頁(yè)數(shù)： 14/36頁(yè)
文件大?。?/td> 875K
代理商： 5962-9688601QRX
TLC2543C, TLC2543I, TLC2543M
12-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SLAS079F – DECEMBER 1993 – REVISED NOVEMBER 2001
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
simplified analog input analysis
Using the equivalent circuit in Figure 18, the time required to charge the analog input capacitance from 0 V to
VS within 1/2 LSB can be derived as follows:
The capacitance charging voltage is given by
(1)
Where:
Rt = Rs + ri
V
C +
V
S
1–e
–tc RtCi
The final voltage to 1/2 LSB is given by
(2)
VC (1/2 LSB) = VS – (VS/8192)
Equating equation 1 to equation 2 and solving for time tc gives
(3)
and
tc (1/2 LSB) = Rt × Ci × ln(8192)
(4)
V
S *
V
S
8192
+ V
S
1–e
–tc RtCi
Therefore, with the values given, the time for the analog input signal to settle is
(5)
tc (1/2 LSB) = (Rs + 1 k) × 60 pF × ln(8192)
This time must be less than the converter sample time shown in the timing diagrams.
Rs
ri
VS
VC
60 pF Max
1 k
Max
Driving Source
TLC2543
Ci
VI
VI = Input Voltage at AIN
VS = External Driving Source Voltage
Rs = Source Resistance
ri = Input Resistance
Ci = Input Capacitance
VC= Capacitance Charging Voltage
Driving source requirements:
Noise and distortion for the source must be equivalent to the
resolution of the converter.
Rs must be real at the input frequency.
Figure 18. Equivalent Input Circuit Including the Driving Source
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