8
00054* [6] 0108 AD29 jsr SPI_xmit
00055 [2] 010A A663 lda #99 ;set frequency to divide by 2000
00056* [6] 010C AD25 jsr SPI_xmit
00057 [2] 010E A61D lda #29 ;set pulse width to 30% duty cycle
00058* [6] 0110 AD21 jsr SPI_xmit
00059
00060 DeselectW1_1
00061 [5] 0112 1000 bset W1,PortA ;deselect the W1 which loads registers
00062 ; with values transmitted
00063
00064 ;
00065 ; Here the CDP68HC05C8B would generally
00066 ; attend to other processing issues
00067 ;
00068
00069 ******* Modify Frequency and Pulse Width
00070
00071 [5] 0114 1100 bclr W1,PortA ;select W1 (CE is active low)
00072* [6] 0116 AD16 jsr Set_SPI_Mode ;Setup the CDP68HC05 SPI Control....
00073 ;to talk to the W1
00074 SendCommands2
00075 [2] 0118 A631 lda #49 ;set frequency to divide by 100 (the
00076* [6] 011A AD17 jsr SPI_xmit ;divide by 2 is still in effect)
00077 [2] 011C A609 lda #9 ;set pulse width to 20% duty cycle
00078* [6] 011E AD13 jsr SPI_xmit
00079
00080 DeselectW1_2
00081 [5] 0120 1000 bset W1,PortA ;deselect the W1 which loads registers
00082
00083 ;
00084 ; Here the CDP68HC05C8B would again
00085 ; attend to other processing issues
00086 ;
00087
00088 ******* Modify Pulse Width
00089
00090 [5] 0122 1100 bclr W1,PortA ;select W1 (CE is active low)
00091* [6] 0124 AD08 jsr Set_SPI_Mode ;Setup the 68HC05 SPI control...
00092 ;to talk to the W1
00093 SendCommands3
00094 [2] 0126 A611 lda #17 ;set pulse width to 38% duty cycle
00095* [6] 0128 AD09 jsr SPI_xmit
00096
00097 DeselectW1_3
00098 [5] 012A 1000 bset W1,PortA ;deselect the W1 which loads registers
00099 ;with values transmitted
00100 Finish
00101 [3] 012C 20FE bra * ;loop forever
00102
00103 ***********************************************************************
00104 * Common Subroutines
00105 ***********************************************************************
00106
00107 012E Section Subroutines, *
00108
00109 Set_SPI_Mode
00110 [2] 012E A650 lda #(2!SPE+2!MSTR) ;Enable SPI as a Master with....
00111 [4] 0130 B70A sta SPCR ;CPHA=CPOL=0,
00112 [6] 0132 81 rts
00113 SPI_Xmit
00114 [4] 0133 B70C sta SPDR ;send A to SPI device
00115 SPI_wait
00116 [5] 0135 0F0BFD brclr SPIF,SPSR,SPI_wait ;wait until transmit complete
00117 [6] 0138 81 rts
00118
00119 Init_W1
00120 [5] 0139 1000 bset W1,PortA ;disable the W1 (CE is active low)
00121 [5] 013B 1004 bset W1,DDRA ;by activating PA0 as a high
CDP68HC68W1