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參數(shù)資料
| 型號： | 6P8B |
| 廠商： | NEC Corp. |
| 英文描述： | MOS INTEGRATED CIRCUIT 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION |
| 中文描述： | 馬鞍山集成電路4位單片機(jī)的紅外遙控傳輸 |
| 文件頁數(shù)： | 18/95頁 |
| 文件大?。?/td> | 692K |
| 代理商： | 6P8B |
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18
μ
PD6P8, 6P8A, 6P8B
Data Sheet U17848EJ3V0DS
3.9 Flags
3.9.1 Status flag (F)
Pin and timer statuses can be checked by executing the STTS instruction to check the status flag.
The status flag is set (to 1) in the following cases.
If the condition specified with the operand is met when the STTS instruction is executed
When standby mode is released.
When the release condition is met at the point of executing the HALT instruction. (In this case, the system
does not enter the standby mode.)
Conversely, the status flag is cleared (to 0) in the following cases:
If the condition specified with the operand is not met when the STTS instruction is executed.
When the status flag has been set (to 1), the HALT instruction executed, but the release condition is not met
at the point of executing the HALT instruction. (In this case, the system does not enter the standby mode.)
Table 3-1. Conditions for Status Flag (F) to Be Set by STTS Instruction
Operand Value of STTS Instruction
Condition for Status Flag (F) to Be Set
b
3
b
2
b
1
b
0
0
0
0
0
High level is input to at least one of K
I
pins.
0
1
1
High level is input to at least one of K
I
pins.
1
1
0
High level is input to at least one of K
I
pins.
1
0
1
The down counter of the timer is 0.
1
Either of the combinations
of b
2
, b
1
, and b
0
above.
[The following condition is added in addition to the above.]
High level is input to at least one of S
0
Note 1
, S
1
Note 1
, or S
2
Note 2
pins.
Notes 1.
The S
0
and S
1
pins must be set to input mode (bit 2 and bit 0 of the P4 register are set to 0 and 1,
respectively).
2.
The use of STOP mode release for the S
2
pin must be enabled (bit 3 of the P4 register is set to 1).
3.9.2 Carry flag (CY)
The carry flag is set (to 1) in the following cases:
If the ANL instruction or the XRL instruction is executed when bit 3 of the accumulator is 1 and bit 3 of the
operand is 1.
If the RL instruction or the RLZ instruction is executed when bit 3 of the accumulator is 1.
If the INC instruction or the SCAF instruction is executed when the value of the accumulator is 0FH.
The carry flag is cleared (to 0) in the following cases:
If the ANL instruction or the XRL instruction is executed when at least either bit 3 of the accumulator or bit
3 of the operand is 0.
If the RL instruction or the RLZ instruction is executed when bit 3 of the accumulator is 0.
If the INC instruction or the SCAF instruction is executed when the value of the accumulator is other than 0FH.
If the ORL instruction is executed.
When data is written to the accumulator by the MOV instruction or the IN instruction.
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