參數(shù)資料
型號: 6P8B
廠商: NEC Corp.
英文描述: MOS INTEGRATED CIRCUIT 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION
中文描述: 馬鞍山集成電路4位單片機的紅外遙控傳輸
文件頁數(shù): 35/95頁
文件大?。?/td> 692K
代理商: 6P8B
35
μ
PD6P8, 6P8A, 6P8B
Data Sheet U17848EJ3V0DS
Table 6-3. Standby Mode Setup (HALT #b
3
b
2
b
1
b
0
B) and Release Conditions
Operand Value of
HALT Instruction
Setting Mode
Precondition for Setup
Release Condition
b
3
b
2
b
1
b
0
0
0
0
0
STOP
All K
I/O
pins are high-level output.
High level is input to at least one
of K
I
pins.
0
1
1
STOP
All K
I/O
pins are high-level output.
High level is input to at least one
of K
I
pins.
1
1
0
STOP
Note 1
The K
I/O0
pin is high-level output.
High level is input to at least one
of K
I
pins.
1
Any of the
STOP
[The following condition is added in addition to the above.]
combinations of
High level is input to at least one
b
2
b
1
b
0
above
of S
0
, S
1
and S
2
pins
Note 2
.
0/1
1
0
1
HALT
When the timer’s down counter is 0
Notes 1.
When setting HALT #
×
110B, configure a key matrix by using the K
I/O0
pin and the K
I
pin so that the
standby mode can be released.
2.
At least one of the S
0
, S
1
and S
2
pins (the pin used for releasing the standby mode) must be specified
as follows:
S
0
, S
1
pins:
Input mode (specified by bits 0 and 2 of the P4 register)
S
2
pin:
Use of STOP mode release enabled (specified by bit 3 of the P4 register)
Cautions 1. The internal reset takes effect when the HALT instruction is executed with an operand value
other than that above or when the precondition has not been satisfied when executing the
HALT instruction.
2. If STOP mode is set when the timer’s down counter is not 0 (timer operating), the system
is placed in STOP mode only after all the 10 bits of the timer’s down counter and the timer
output permit flag are cleared to 0.
3. Write the NOP instruction as the first instruction after STOP mode is released.
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