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參數(shù)資料
| 型號(hào)： | 6SP220M |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | DB-LM3S101 Daughterboard |
| 中文描述： | 同步降壓控制器，帶有預(yù)偏置啟動(dòng)和可選時(shí)鐘同步 |
| 文件頁數(shù)： | 19/23頁 |
| 文件大?。?/td> | 1002K |
| 代理商： | 6SP220M |
Application Information
(Continued)
P
SW
= 0.5 x 3.3V x 4A x 300 kHz x 31 ns
P
SW
= 61.38 mW
The FDS6898A has a typical turn-on rise time t
and turn-off
fall time t
of 15 ns and 16 ns, respectively. The switching
losses for this type of dual N-Channel MOSFETs are
0.061W.
FET Conduction Loss (P
CND
)
P
CND
= P
CND1
+ P
CND2
P
CND1
= I
2OUT
x R
DS(ON)
x k x D
P
CND2
= I
2OUT
x R
DS(ON)
x k x (1-D)
R
DS(ON)
= 13 m
and the factor is a constant value (k = 1.3)
to account for the increasing R
DS(ON)
of a FET due to heat-
ing.
P
CND1
= (4A)
2
x 13 m
x 1.3 x 0.364
P
CND2
= (4A)
2
x 13 m
x 1.3 x (1 - 0.364)
P
CND
= 98.42 mW + 172 mW = 270.42 mW
There are few additional losses that are taken into account:
IC Operating Loss (P
IC)
P
IC
= I
Q_VCC
x V
CC
,
where I
Q-VCC
is the typical operating V
CC
current
P
IC
= 1.7 mA x 3.3V = 5.61 mW
FET Gate Charging Loss (P
GATE
)
P
GATE
= n x V
CC
x Q
GS
x f
SW
P
GATE
= 2 x 3.3V x 3 nC x 300 kHz
P
GATE
= 5.94 mW
The value n is the total number of FETs used and Q
is the
typical gate-source charge value, which is 3 nC. For the
FDS6898A the gate charging loss is 5.94 mW.
Input Capacitor Loss (P
CAP
)
where,
Here n is the number of paralleled capacitors, ESR is the
equivalent series resistance of each, and P
CAP
is the dissi-
pation in each. So for example if we use only one input
capacitor of 24 m
.
P
CAP
= 88.8 mW
Output Inductor Loss (P
IND
)
P
IND
= I
2OUT
x DCR
where DCR is the DC resistance. Therefore, for example
P
IND
= (4A)
2
x 11 m
P
IND
= 176 mW
Total System Efficiency
P
TOTAL
= P
FET
+ P
IC
+ P
GATE
+ P
CAP
+ P
IND
L
www.national.com
19
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