參數(shù)資料
型號: 73K224L-IH
廠商: TDK Corporation
英文描述: V.22bis/V.22/V.21/ Bell 212A/Bell 103 Single-Chip Modem
中文描述: V.22bis/V.22/V.21 /貝爾212A/Bell 103單芯片調(diào)制解調(diào)器
文件頁數(shù): 15/32頁
文件大?。?/td> 206K
代理商: 73K224L-IH
73K224L
V.22bis/V.22/V.21/Bell 212A/Bell 103
Single-Chip Modem
15
CONTROL REGISTER 2
(continued)
D7
0
D6
D5
D4
D3
D2
D1
D0
CR2
100
SPEC REG
ACCESS
CALL INIT
TRANSMIT
S1
16WAY
RESET
DSP
TRAIN
INHIBIT
EQUALIZER
ENABLE
BIT NO.
D4
NAME
Transmit S1
CONDITION
0
DESCRIPTION
The transmitter when placed in alternating mark/space
mode transmits 0101...... scrambled or not dependent on
the bypass scrambler bit.
When this bit is 1 and only when the transmitter is placed in
alternating mark/space mode by CR1 bits D7, D6, and in
DPSK or QAM, an unscrambled repetitive double dibit
pattern of 00 and 11 at 1200 bit/s (S1) is sent.
DEMOD mode: The DSP is setup to do demodulation and
pattern detection based on the various mode bits. Both
answer tones are detected in demod mode concurrently (wide
band detection); TR-D0 is ignored.
CALL INIT mode: The DSP decodes unscrambled mark,
answer tone and call progress tones.
Normal CR3 access.
Setting this bit and addressing CR3 allows access to the
SPECIAL REGISTER. See the SPECIAL REGISTER for
details.
Only write zero to this bit.
1
0
D5
Call Init
1
0
1
D6
Special
Register
Access
D7
Not used at this time
0
CONTROL REGISTER 3
D7
D6
D5
0
D4
D3
D2
D1
D0
CR3
101
TXDALT
TRISTATE
TX/RXCLK
RECEIVE
BOOST
ENABLE
TRANSMIT
ATTEN. 3
TRANSMIT
ATTEN. 2
TRANSMIT
ATTEN. 1
TRANSMIT
ATTEN. 0
BIT NO.
D3, D2,
D1,D0
NAME
Transmit
Attenuator
CONDITION
D3 D2
0
0
1
1
DESCRIPTION
Sets the attenuation level of the transmitted signal in 1dB
steps. The default (D3-D0=0100) is for a transmit level of –
10 dBm0 on the line with the recommended hybrid transmit
gain. The total range is 16 dB.
18 dB receive front end boost is not used.
Boost is in the path. This boost does not change reference
levels. It is used to extend dynamic range by compensating
for internally generated noise when receiving weak signals.
The receive level detect signal and knowledge of the hybrid
and transmit attenuator setting will determine when boost
should be enabled.
Only write zero to this bit.
TXCLK and RXCLK are driven.
D1 D0
0
1
0
1
0
1
D4
Receive Gain
Boost
Not used at this time
D5
D6
0
0
TRISTATE
TXCLK/RXCLK
1
TXCLK and RXCLK are tri
-
stated.
D7
TXDALT
Spec. Reg. Bit D3=1
Alternate TX data source. See Special Register.
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