- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10994 > 73M1906B-IVTR/F (Maxim Integrated Products)MICRODAA SET FXO OF VOIP 20TSSOP PDF資料下載
參數(shù)資料
| 型號： | 73M1906B-IVTR/F |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 36/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | MICRODAA SET FXO OF VOIP 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 系列： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁當(dāng)前第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
DS_1x66B_001
73M1866B/73M1966B Data Sheet
Rev. 1.6
41
7
Hardware Control Functions
This section describes the 73M1x66B capabilities with respect to its configuration and hardware pin
control. These include features such as Device Revision, Interrupt Management, Power Management,
Clock Control, General Purpose Input/Output (GPIO) and control of the Call Progress Monitor.
7.1
Device Revision
The 73M1x66B provides the device revision number for the Host-Side Device and the Line-Side Device.
For the 73M1x66B:
Revision for the Host-Side Device is: 0100.
Revision for the Line-Side Device is: 1101.
Function
Mnemonic
Register
Location
Type
Description
REVHSD
0x04[3:0]
R
Host-Side Device Revision
These read only status bits indicate the revision of the 73M1x66B
Host-Side Device (73M1906B).
REVLSD
0x1D[7:4]
R
Line-Side Device Revision
These read-only status bits provide the Device ID for the 73M1x66B
Line-Side Device (73M1916).
When barrier is synchronized, REV has the value of 1101.
When barrier is not synchronized, the value of the field is 0000.
7.2
Interrupt Control
The 73M1x66B supports a single interrupt that can be asserted under several configurable conditions.
These include status of GPIOs, PCLKDT, RGMON, DET, SYNL and RGDT.
All interrupt sources that are enabled are ORed together to create the
INT output signal. GPIO ports that
are configured to be output will not generate interrupts.
When the
INT pin goes active (low), the host should read the interrupt source Register 0x03, which is
then automatically cleared after the read operation. An interrupt during wake-on-ring should be
interpreted as the detection of a valid ring signal.
Address 0x03
Reset State E0h
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
GPIO7
GPIO6
GPIO5
PCLKDT
RGMON
DET
SYNL
RGDT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-2VX-IY-F4 | CONVERTER MOD DC/DC 5.2V 50W |
| VI-2VX-IY-F2 | CONVERTER MOD DC/DC 5.2V 50W |
| VI-B0M-IY-F4 | CONVERTER MOD DC/DC 10V 50W |
| VI-2VV-IY-F4 | CONVERTER MOD DC/DC 5.8V 50W |
| VI-2VV-IY-F3 | CONVERTER MOD DC/DC 5.8V 50W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73M1906-IVT/F | 制造商:TERIDIAN 功能描述: |
| 73M1912-IM/F | 功能描述:電信線路管理 IC MicroDAA Chip Set Line Side RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| 73M1912-IMR/F | 功能描述:電信線路管理 IC MicroDAA Chip Set Line Side RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| 73M1912-IVT/F | 功能描述:電信線路管理 IC MicroDAA Chip Set Line Side RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| 73M1912-IVTR/F | 功能描述:電信線路管理 IC MicroDAA Chip Set Line Side RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。