參數(shù)資料
型號(hào): 73M1906B-IVTR/F
廠商: Maxim Integrated Products
文件頁數(shù): 59/88頁
文件大?。?/td> 0K
描述: MICRODAA SET FXO OF VOIP 20TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
系列: *
73M1866B/73M1966B Data Sheet
DS_1x66B_001
62
Rev. 1.6
Function
Mnemonic
Register
Location
Type
Description
RSTLSBI
0x0D[3]
W
Reset Line-Side Barrier Interface
To reset the Line-Side Barrier Interface, set this bit to 1.
1 = Resets the Line-Side Barrier Interface. The chip sets this bit back
to 0 after it has completed resetting the Line-Side Barrier Interface.
SLHS
0x0D[6]
R
Synchronization Lost Host Side
This bit indicates the status of the Barrier Interface as seen from the
Host-Side.
0 = Host-Side Barrier Interface is synchronized.
1 = Host-Side Barrier Interface lost synchronization.
Once read, the SLHS bit is reset, but will be set again if the
synchronization loss continues.
SLLS
0x1E[2]
R
Synchronization Loss Line Side
0 = TXRDY will continuously be generated following Synchronization
Loss so as to allow SLLS information to be transferred across the
barrier. This causes an automatic transfer of 1Eh. (Default)
1 = Synchronization is lost in the Line-Side Device due to Header.
SYNL
0x03[1]
R
Barrier Synchronization Loss
0 = Indicates synchronization of data across the barrier.
1 = Indicates a loss of synchronization of data across the barrier.
This status bit is reset when read. This is a maskable interrupt. It is
enabled by the ENSYNL bit.
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73M1906-IVT/F 制造商:TERIDIAN 功能描述:
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73M1912-IVT/F 功能描述:電信線路管理 IC MicroDAA Chip Set Line Side RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
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