參數(shù)資料
型號(hào): 73M2921
廠商: Electronic Theatre Controls, Inc.
英文描述: Advanced Single Chip Modem
中文描述: 先進(jìn)的單芯片調(diào)制解調(diào)器
文件頁數(shù): 19/41頁
文件大?。?/td> 222K
代理商: 73M2921
73M2921
Advanced Single
Chip Modem
February 99 Rev M
TDK Semiconductor
Page 19 of 41
HANDSHAKE REGISTER
ADDRESS: 01H (01d, 00001b) MODE: DATA
BIT D7
V.23
BIT D6
V.21
BIT D5
Bell 103
BIT D4
Bell 212
BIT D3
V.22
BIT D2
V.22bis
BIT D1
Bell 202
BIT D0
Res.
BIT NO.
D0
D1
D2
D3
D4
D5
D6
D7
NAME
Reserved
Bell 202
V.22bis
V.22
Bell 212
Bell 103
V.21
V.23
CONDITION
1
1
1
1
1
1
1
1
DESCRIPTION
Reserved for future use.
Instructs the modem to attempt a Bell 202 handshake
Instructs the modem to attempt a V.22bis handshake
Instructs the modem to attempt a V.22 handshake
Instructs the modem to attempt a Bell 212 handshake
Instructs the modem to attempt a Bell 103 handshake
Instructs the modem to attempt a V.21 handshake
Instructs the modem to attempt a V.23 handshake
Note: The Handshake register defines the handshake methods allowed during the connection phase of a
communication session. Only one bit can be set at a given time except for automatic V.22bis fallback to V.22 or
Bell 212A which requires both BIT D2 and BIT D3 to be set. The master transmit enable, TXEN, BIT D7 of the
TRANSMIT CONTROL REGISTER (0CH) must be set for the handshake transmit functions to operate.
CONNECTION DETECT REGISTER (READ ONLY)
ADDRESS: 02h (02d, 00010b) MODE: DATA, FAX
BIT D7
V.23 (data)
V.29 (fax)
BIT D6
V.21 (data)
V.21 CH2 (fax)
BIT D5
Bell 103
BIT D4
Bell 212
BIT D3
V.22 (data)
V.27ter (fax)
BIT D2
V.22bis
BIT D1
Bell 202
BIT D0
Res.
BIT
NO.
D0
D1
D2
D3
NAME
CONDITION
DESCRIPTION
Reserved
Bell 202
V.22bis
V.22
V.27ter
Bell 212
Bell 103
V.21
V.21 CH2
V.23
V.29
Reserved for future use.
Informs processor Bell 202 was detected.
Informs processor of a successful V.22bis connection.
Informs processor of a successful V.22 connection.
Informs processor of a successful V.27ter connection.
Informs processor of a successful Bell 212A connection.
Informs processor of a successful Bell 103 connection.
Informs processor of a successful V.21 connection.
Informs processor of a successful V.21 CH2 connection.
Informs processor of a successful V.23 connection.
Informs processor of a successful V.29 connection.
Data Mode
Fax Mode
D4
D5
D6
Data Mode
Fax Mode
Data Mode
Fax Mode
D7
Note: All bits are zero until a successful connection has been established (carrier detect valid, data mode active).
Then the appropriate bit will be set. This register is shared between fax and data modes. Only bits D3, D6, and
D7 are valid when in fax mode.
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