參數(shù)資料
型號: 73S1209F-68IMR/F
廠商: TERIDIAN SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: POWER SUPPLY MANAGEMENT CKT, QCC68
封裝: LEAD FREE, QFN-68
文件頁數(shù): 11/123頁
文件大小: 1385K
代理商: 73S1209F-68IMR/F
73S1209F Data Sheet
DS_1209F_004
108
Rev. 1.2
Symbol
Parameter
Condition
Min
Typ.
Max
Unit
Interface Requirements – Data Signals: I/O, AUX1 and AUX2.
VOH
Output level, high (I/O,
AUX1, AUX2)
IOH =0
0.9 * VCC
VCC+0.1
V
IOH = -40μA
0.75 VCC
VCC+0.1
V
VOL
Output level, low (I/O, AUX1,
AUX2)
IOL=1mA
0.15 *VCC
V
VIH
Input level, high (I/O, AUX1,
AUX2)
0.6 * VCC
VCC+0.30
V
VIL
Input level, low (I/O, AUX1,
AUX2)
-0.15
0.2 *
VCC
V
VINACT
Output voltage when outside
of session
IOL = 0
0.1
V
IOL = 1mA
0.3
V
ILEAK
Input leakage
VIH = VCC
10
μA
IIL
Input current, low (I/O, AUX1,
AUX2)
VIL = 0
0.65
mA
ISHORTL
Short circuit output current
For output low, shorted
to VCC through 33Ω
15
mA
ISHORTH
Short circuit output current
For output high,
shorted to ground
through 33
Ω
15
mA
tR, tF
Output rise time, fall times
For I/O, AUX1, AUX2,
CL = 80pF, 10% to
90%.
100
ns
tIR, tIF
Input rise, fall times
1
μs
RPU
Internal pull-up resistor
Output stable for
>200ns
8
11
14
k
Ω
FDMAX
Maximum data rate
1
MHz
Reset and Clock for Card Interface, RST, CLK
VOH
Output level, high
IOH =-200μA
0.9 * VCC
VCC
V
VOL
Output level, low
IOL=200μA
0
0.15 *
VCC
V
VINACT
Output voltage when outside
of session
IOL = 0
0.1
V
IOL = 1mA
0.3
V
IRST_LIM
Output current limit, RST
30
ICLK_LIM
Output current limit, CLK
70
mA
CLKSR3V
CLK slew rate
VCC = 3V
0.3
V/ns
CLKSR5V
CLK slew rate
VCC = 5V
0.5
V/ns
tR, tF
Output rise time, fall time
CL = 35pF for CLK,
10% to 90%
8
ns
CL = 200pF for RST,
10% to 90%
100
ns
δ
Duty cycle for CLK
CL =35pF,
FCLK 20MHz
45
55
%
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