參數(shù)資料
型號(hào): 73S1217F-68IM/F/P
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 20/93頁(yè)
文件大小: 0K
描述: IC SMART CARD READER PROG 68-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 260
系列: 73S12xx
核心處理器: 80515
芯體尺寸: 8-位
速度: 24MHz
連通性: I²C,智能卡,UART/USART,USB
外圍設(shè)備: LED,POR,WDT
輸入/輸出數(shù): 8
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-VFQFN 裸露焊盤(pán)
包裝: 管件
UG_12xxF_016
73S12xxF Software User Guide
Rev. 1.50
27
Synopsis
Void RTClk_Init ( void );
Parameters
None.
Return Codes
None.
RTCClk_Control ()
Purpose
Enable or disable the RTC interrupt. If enabled, the interrupt interval must be
specified.
Synopsis
RTCClk_Control ( IN Bbool RTCInt_Enb, IN enum RTC_INTERVAL intv );
Parameters
RTCInt_Enb: Input parameter
Enable (TRUE) or disable (FALSE) the RTC interrupt. If set to Enable when the intv
parameter is set to NO_INT, the RTC interrupt will NOT be enabled.
Intv: Input parameter
The RTC interrupt interval as defined in API_STRUCT_12.h as follows:
HALF_SEC
Interrupt to occur every second.
ONE_SEC
Interrupt to occur every 1 second (default).
TWO_SEC
Interrupt to occur every 2 seconds.
FOUR_SEC
Interrupt to occur every 4 seconds.
EIGHT_SEC
Interrupt to occur every 8 seconds.
NO_INT
No interrupt.
Return Codes
None.
The watchdog timer will give the processor second to respond to an RTC interrupt. If the RTC
interrupt is not serviced within this timeframe, a full reset will be performed.
RTClk_Write ()
Purpose
Initialize the Real Time Clock control, counter, accumulator and trim registers. When
this function is called, the RTC is stopped and restarted.
Synopsis
Void RTClk_Write ( IN struct RTC_t *pRTC );
Where RTC_t is defined as:
struct RTC_t
{
Unsigned char RTCCtl;
Unsigned long RTCCnt;
Unsigned char
RTCAcc[3];
Signed char
RTCTrim[3];
}
Parameters
RTCCtl: Input parameter
BIT[7-6]: not used
BIT[5]: RTCLoad – when set, RTCCnt, RTCAcc and RTCTrim are loaded at the next
32kHz clock positive edge.
BIT[4-3]: Set tic interval as follows:
0x – 1 second
10 – second
11 – 2 seconds
BIT[2-0]: Set interrupt interval as follows:
100 – second
0xx – 1 second
101 – 2 seconds
110 – 4 seconds
111 – 8 seconds
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