參數(shù)資料
型號(hào): 74ABT16853DGGRE4
廠商: Texas Instruments, Inc.
英文描述: DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS
中文描述: 雙8位至9位奇偶總線收發(fā)器
文件頁(yè)數(shù): 6/9頁(yè)
文件大小: 153K
代理商: 74ABT16853DGGRE4
SN54ABT16853, SN74ABT16853
DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS
SCBS153B – OCTOBER 1992 – REVISED JANUARY 1997
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
VCC = 5 V,
TA = 25
°
C
MIN
8.5
SN54ABT16853
SN74ABT16853
UNIT
MAX
MIN
8.5
MAX
MIN
8.5
MAX
tw
Pulse duration
LE high or low
ns
CLR low
A, B, and PARITY before LE
CLR before LE
A, B, and PARITY after LE
CLR after LE
4
4
4
tsu
Setup time
10
10
10
ns
0
0
0
th
Hold time
0
0
0
0
0
0
ns
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25
°
C
MIN
1.5
SN54ABT16853
SN74ABT16853
UNIT
TYP
2.5
MAX
3.3
MIN
1.5
MAX
4.2
MIN
1.5
MAX
4.1
tPLH
tPHL
tPLH
tPHL
tPLH
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
A or B
B or A
ns
2
3.1
3.9
2
4.5
2
4.3
A or OE
PARITY
2
4.6
5.9
2
7.3
2
7.1
ns
2
4.8
6.2
2
7.6
2
7.2
CLR
ERR
2
3.7
5.1
2
5.9
2
5.7
ns
OE
A or B
2
3.9
4.9
2
5.8
2
5.6
ns
2.5
4.3
5.1
2.5
6.2
2.5
6
OE
A or B
2
3.6
4.5
2
5.5
2
5.4
ns
1.5
3
3.8
1.5
4.7
1.5
4.3
OE
PARITY
2
3.6
5
2
5.8
2
5.7
ns
2.5
4.4
5.8
2.5
6.7
2.5
6.5
OE
PARITY
1.5
3.2
4
1.5
4.8
1.5
4.7
ns
1.5
2.9
3.7
1.5
4.2
1.5
4.1
LE
ERR
2
3.5
4.2
2
5
2
4.8
ns
2
3.4
4.4
2
5.2
2
4.9
A B or PARITY
A, B, or PARITY
ERR
2
2
4.5
4.8
6.3
6.3
2
2
7.5
7.7
2
2
7.2
7.4
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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