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| 型號： | 74ABT16853DGGRE4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS |
| 中文描述： | 雙8位至9位奇偶總線收發(fā)器 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大小： | 153K |
| 代理商： | 74ABT16853DGGRE4 |
SN54ABT16853, SN74ABT16853
DUAL 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS
SCBS153B – OCTOBER 1992 – REVISED JANUARY 1997
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500
500
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST
S1
tPHL (see Note E)
tPLH (see Note F)
7 V
7 V
ERR
S1
1.5 V
th
tsu
Data Input
Timing Input
1.5 V
3 V
0 V
1.5 V
1.5 V
3 V
0 V
3 V
0 V
1.5 V
1.5 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V
1.5 V
3 V
0 V
1.5 V
1.5 V
Input
1.5 V
Output
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
3.5 V
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH – 0.3 V
≈
0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
, tr
≤
2.5 ns, tf
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPHL is measured at 1.5 V.
F. tPLH is measured at VOL + 0.3 V.
Figure 1. Load Circuit and Voltage Waveforms
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相關(guān)代理商/技術(shù)參數(shù) |
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| 74ABT16853DGGRG4 | 功能描述:總線收發(fā)器 Dual 8-9B Parity Bus Xceivers RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT16899 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit latched transceiver with 16-bit parity generator/checker 3-State |
| 74ABT16899DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit latched transceiver with 16-bit parity generator/checker 3-State |
| 74ABT16899DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit latched transceiver with 16-bit parity generator/checker 3-State |
| 74ABT16899DL,512 | 功能描述:總線收發(fā)器 18-BIT LATCH XCVR W/PARITY 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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