參數(shù)資料
型號(hào): 74AC11833
廠商: Texas Instruments, Inc.
英文描述: 8-Bit To 9-Bit Parity Bus Transceivers(8位-9位奇偶總線接收傳送器)
中文描述: 8位到第9位奇偶總線收發(fā)器(8位-9位奇偶總線接收傳送器)
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 82K
代理商: 74AC11833
PARAMETER
TEST CONDITIONS
VCC
UNIT
VOH
VOL
IOZ
II
Ci
Cio
V
V
pF
pF
μ
A
IOH = –24 mA
IOL = 24 mA
IOL = 50 mA
IOL = 75 mA
VO = VCC or GND
VI = VCC or GND
VI = VCC or GND
VO = VCC or GND
5 V
5 V
5.5 V
5.5 V
4.5
12
±
0.5
±
10
±
5
±
0.1
±
1
±
1
μ
A
UNIT
Setup time before CLK
Hold time after CLK
, Bi and PARITY
NOTE 1: Load circuit and voltage waveforms are shown in Section 1 of Advanced CMOS Logic Data Book, 1990.
tsu
th
ns
ns
54AC11833, 74AC11833
8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
5
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25
°
C
TYP
54AC11833
MIN
74AC11833
MIN
MIN
MAX
0.5
MAX
MAX
IOH
ERR
VO = VCC
5.5 V
3 V
4.5 V
5.5 V
3 V
4.5 V
5.5 V
5.5 V
5.5 V
3 V
4.5 V
5.5 V
3 V
4.5 V
5.5 V
5.5 V
5.5 V
10
5
μ
A
2.9
4.4
5.4
2.58
3.94
4.94
2.9
4.4
5.4
2.4
3.7
4.7
3.85
2.9
4.4
5.4
2.48
3.8
4.8
IOH = –50
μ
A
All outputs except
ERR
IOH = –4 mA
IOH = –50 mA
IOH = –75 mA
3.85
0.1
0.1
0.1
0.36
0.36
0.36
0.1
0.1
0.1
0.5
0.5
0.5
1.65
0.1
0.1
0.1
0.44
0.44
0.44
IOL = 50
μ
A
IOL = 12 mA
1.65
A or B ports,
PARITY
OEA, OEB, CLK,
and CLR
ICC
VI = VCC or GND, IO = 0
5.5 V
8
160
80
μ
A
OEA, OEB, CLK,
and CLR
A or B ports,
PARITY
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
timing requirements over recommended operating free-air temperature range,
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Note 1)
TA = 25
°
C
MIN
5
5
5
14
2
0
54AC11833
MIN
5
5
5
14
2
0
74AC11833
MIN
5
5
5
14
2
0
MAX
MAX
MAX
CLK high
CLK low
CLR low
Bi and PARITY
CLR inactive
tw
Pulse duration
ns
P
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