參數(shù)資料
型號(hào): 74ALVCH16271DLG4
廠商: Texas Instruments, Inc.
英文描述: 12-BIT TO 24-BIT MULTIPLEXED BUS EXCHANGER WITH 3-STATE OUTPUTS
中文描述: 12位至24位復(fù)用總線交換具有三態(tài)輸出
文件頁(yè)數(shù): 7/15頁(yè)
文件大?。?/td> 216K
代理商: 74ALVCH16271DLG4
www.ti.com
PARAMETER MEASUREMENT INFORMATION
V
CC
= 1.8 V
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
OH
V
OL
t
h
t
su
From Output
Under Test
C
L
= 30 pF
(see Note A)
LOAD CIRCUIT
S1
Open
GND
1 k
1 k
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
×
V
CC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
t
PZL
t
PZH
t
PLZ
t
PHZ
0 V
V
OL
+ 0.15 V
V
OH
0.15 V
0 V
V
CC
0 V
0 V
t
w
V
CC
V
CC
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Timing
Input
Data
Input
Input
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
2
×
V
CC
GND
TEST
S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, Z
O
= 50
, t
r
2 ns, t
f
2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
PLZ
and t
PHZ
are the same as t
dis
.
F. t
PZL
and t
PZH
are the same as t
en
.
G. t
PLH
and t
PHL
are the same as t
pd
.
0 V
V
CC
V
CC
/2
t
PHL
V
CC
/2
V
CC
/2
V
CC
0 V
V
OH
V
OL
Input
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
V
CC
/2
V
CC
/2
t
PLH
2
×
V
CC
V
CC
SN74ALVCH16271
12-BIT TO 24-BIT MULTIPLEXED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES017G–JULY 1995–REVISED SEPTEMBER 2004
Figure 1. Load Circuit and Voltage Waveforms
7
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