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參數資料
| 型號： | 74LVC1G57GV,125 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 5/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONFIG MULTI-FUNC GATE SC-74 |
| 產品培訓模塊： | Logic Packages |
| 標準包裝： | 1 |
| 系列： | 74LVC |
| 邏輯類型： | 可配置多功能 |
| 電路數： | 1 |
| 輸入數： | 3 |
| 施密特觸發(fā)器輸入： | 是 |
| 輸出類型： | 單端 |
| 輸出電流高，低： | 32mA，32mA |
| 電源電壓： | 1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SC-74，SOT-457 |
| 供應商設備封裝： | 6-TSOP |
| 包裝： | 標準包裝 |
| 產品目錄頁面： | 840 (CN2011-ZH PDF) |
| 其它名稱： | 568-4835-6 |
CS35L01/03
16
DS909F1
In both HD and FHD mode, the value of the capacitance connected to the LFILT+ pin must not exceed
4.7
F. If this value is greater than 4.7 F, it will prevent the rail voltage of the output devices from transi-
tioning properly between VBATT and the internal LDO.
5.1.2.1
HD Mode
Hybrid Class-D mode (HD) provides competitive analog performance with a substantial reduction in idle
power dissipation and radiation emissions. In this mode, the output switches at 192 kHz and a secondary
supply is derived from VBATT using an internal 1.0-VDC low drop-out linear regulator (LDO). When the
output signal is at a low amplitude, the Class-D output stage begins to switch from the lower rail voltage
created by the internal LDO. This not only decreases idle power consumption when output capacitors are
used, but also reduces electromagnetic emissions by reducing the amplitude of the square waves being
created at the output of the CS35L01/03 when operating at low amplitude or idle power.
5.1.2.2
FHD Mode
The Reduced Frequency Hybrid Class-D (FHD) mode provides the best overall EMI performance and the
lowest power consumption with slightly decreased frequency response near the top frequency range of
the audio band, for high amplitude signals. In this mode of operation, the output switching frequency is
reduced to 76 kHz during high amplitude transients on the output. The threshold at which this transition
from 192-kHz to 76-kHz switching rate occurs is given as the Input Level Threshold for FHD Operation in
“Electrical Characteristics - FHD Mode” on page 13. Combined with the lower amplitude switching offered
by the Hybrid design, this reduction in switching energy dramatically reduces the emissions levels of the
output stage and its associated components.
5.2
Reducing the Gain with External Series Resistors
If necessary, it is possible to decrease the gain of the CS35L01/03 by adding series resistors to the audio
input signal as is shown in Figure 4 below.
If input resistors are added, the new gain of the amplifier can be determined by the following equation:
Where:
AV(adjusted) = The new, adjusted gain of the system
ZIN = Input impedance of the device being used (See “Electrical Characteristics - SD Mode” on page 10,
“Electrical Characteristics - FSD Mode” on page 11, “Electrical Characteristics - HD Mode” on page 12, or
“Electrical Characteristics - FHD Mode” on page 13 for this value.)
ZEXT = Value of the resistor added in series with the inputs
Audio In+
Audio In-
RIN
AIN+
AIN-
x
Figure 4. Adjusting Gain via External Series Resistance
A
V adjusted
A
V
20
–
Z
IN
Z
IN
Z
EXT
+
--------------------------
log
=
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| 74LVC1G57GV-G | 功能描述:邏輯門 3.3V LP CONFIG GATE RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74LVC1G57GV-Q100H | 功能描述:Configurable Multiple Function Configurable 1 Circuit 3 Input 6-TSOP 制造商:nxp semiconductors 系列:汽車級，AEC-Q100，74LVC 包裝:帶卷（TR） 零件狀態(tài):有效 邏輯類型:可配置多功能 電路數:1 輸入數:3 施密特觸發(fā)器輸入:是 輸出類型:單端 電流 - 輸出高，低:32mA，32mA 電壓 - 電源:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SC-74，SOT-457 供應商器件封裝:6-TSOP 標準包裝:3,000 |
| 74LVC1G57GW | 制造商:NXP Semiconductors 功能描述:IC CONFIG MULTI-FUNC GATE XSON6 制造商:NXP Semiconductors 功能描述:IC, CONFIG MULTI-FUNC GATE, XSON6 制造商:NXP Semiconductors 功能描述:IC, CONFIG MULTI-FUNC GATE, XSON6, Logic Type:Configurable Multiple Function, Output Current:32mA, No. of Inputs:3, Supply Voltage Min:1.65V, Supply Voltage Max:5.5V, Logic Case Style:SOT-363, No. of Pins:6, Operating Temperature , RoHS Compliant: Yes |
| 74LVC1G57GW,125 | 功能描述:邏輯門 3.3V LP CONFIG GATE RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| 74LVC1G57GW125 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
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