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參數(shù)資料
| 型號： | 7536 |
| 英文描述： | Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R |
| 中文描述： | 7536組數(shù)據(jù)表數(shù)據(jù)表660K/SEP.05.00 |
| 文件頁數(shù)： | 25/46頁 |
| 文件大?。?/td> | 660K |
| 代理商： | 7536 |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7536 Group
MITSUBISHI MICROCOMPUTERS
24
Fig. 27 Structure of serial I/O1-related registers (4)
Transmit buffer empty flag
0: Buffer full
1: Buffer empty
Receive buffer full flag
0: Buffer empty
1: Buffer full
Transmit shift register shift completion flag
0: Transmit shift in progress
1: Transmit shift completed
Overrun error flag
0: No error
1: Overrun error
Parity error flag
0: No error
1: Parity error
Framing error flag
0: No error
1: Framing error
Summing error flag
0: No error
1: Summing error
Not used (returns “1” when read)
USB sequence bit initialization register
(INISQ1: address 0026
16
)
A sequence bit of endpoint 1 is initialized.
CPU read: Disabled
CPU write: Dummy
Hardware read: Not used
Hardware write: Not used
b7 b0
b7 b0
b7 b0
b7 b0
USB control register
(USBCON: address 0027
16
)
Not used (return “1” when read)
USBV
REFOUT
output valid flag
0: Output off
1: Output on
Remote wake up request flag
0: No request
1: Remote wake up request
CPU read: Disabled
CPU write: Set/Clear
Hardware read: Used
Hardware write: Not used
CPU read: Disabled
CPU write: Set
Hardware read: Used
Hardware write: Clear
UART status register
(UARTSTS: address 0019
16
)
CPU read: Enabled
CPU write: Disabled
Hardware read: Not used
Hardware write: Set/Clear
Baud rate generator
(BRG: address 001C
16
)
This register is valid only when selecting the UART mode.
A baud rate value is set.
CPU read: Disabled
CPU write: Set/Clear
Hardware read: Used
Hardware write: Not used
CPU read: Enabled
CPU write: Clear
Hardware read: Not used
Hardware write: Set
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| 754080 | 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R |
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