參數(shù)資料
型號: 78Q2133/F
廠商: Maxim Integrated Products
文件頁數(shù): 6/38頁
文件大?。?/td> 0K
描述: TXRX 10/100 MDIX 3.3V IND 32-QFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 490
類型: PHY 收發(fā)器
驅動器/接收器數(shù): 4/4
規(guī)程: IEEE 802
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 管件
78Q2123/78Q2133 Data Sheet
DS_21x3_001
14
Rev. 1.6
3
Register Description
The 78Q2123/78Q2133 implement 13 16-bit registers, which are accessible via the MDIO and MDC pins.
The supported registers are shown below in the following table. Attempts to read unsupported registers
will be ignored and the MDIO pin will not be enabled as an output, as per the IEEE 802.3 specification.
All of the registers except those that are unique to the 78Q2123/78Q2133 will respond to the broadcast
PHYAD value of ‘00000’. The registers specific to the 78Q2123/78Q2133 occupy address space
MR16-24.
Address
Symbol
Name
Default (Hex)
0
MR0
Control
(3100)
1
MR1
Status
(7849)
2
MR2
PHY Identifier 1
000E
3
MR3
PHY Identifier 2
7237
4
MR4
Auto-Negotiation Advertisement
(01E1)
5
MR5
Auto-Negotiation Link Partner Ability
0000
6
MR6
Auto-Negotiation Expansion
0000
7
MR7
Not Implemented
0000
8-14
MR8-14
Reserved
0000
15
MR15
Not Implemented
0000
16
MR16
Vendor Specific
(0140)
17
MR17
Interrupt Control/Status Register
0000
18
MR18
Diagnostic Register
0000
19
MR19
Transceiver Control
4XXX
20-22
MR20-22
Reserved
0000
23
MR23
LED Configuration Register
0010
24
MR24
MDI/MDIX Control Register
(00C0)
Legend
Type
Description
Type
Description
R
Readable by management.
W
Writeable by management.
WC
Writeable by management. Self
Clearing.
RC
Readable by management.
Cleared upon a read operation.
0/1
Default value upon power up or
reset.
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