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參數(shù)資料
| 型號： | 79RC32334-133BB |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDT Interprise Integrated Communications Processor |
| 中文描述： | IDT的洽談會集成通信處理器 |
| 文件頁數(shù)： | 16/30頁 |
| 文件大小： | 467K |
| 代理商： | 79RC32334-133BB |
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16 of 30
August 31, 2004
IDT 79RC32334—Rev. Y
pci_eeprom_mdi
Thld
pci_clk rising,
pci_eeprom_sk falling
15
—
12
—
10
—
ns
pci_eeprom_mdo, pci_eeprom_cs
Tdo
pci_clk rising,
pci_eeprom_sk falling
—
15
—
12
—
10
ns
pci_eeprom_sk
Tdo
pci_clk rising
—
15
—
12
—
10
ns
pci_ad[31:0], pci_cbe_n[3:0], pci_par, pci_frame_n,
pci_trdy_n, pci_irdy_n, pci_stop_n, pci_perr_n,
pci_serr_n, pci_devsel_n
Tdo
pci_clk rising
2
6
2
6
2
6
ns
Per PCI 2.2
pci_req_n[0], pci_gnt_[2], pci_gnt_n[1],
pci_gnt_n[0], pci_inta_n
Tdo
pci_clk rising
2
6
2
6
2
6
ns
SDRAM Controller
sdram_245_dt_r_n
Tdo8
cpu_masterclk rising
—
15
—
12
—
10
ns
Chapter 11,
Figures 11.4
and 11.5
sdram_ras_n, sdram_cas_n, sdram_we_n,
sdram_cs_n[3:0], sdram_s_n[1:0],
sdram_bemask_n[3:0], sdram_cke
Tdo9
cpu_masterclk rising
—
12
—
9
—
8
ns
sdram_addr_12
Tdo10
cpu_masterclk rising
—
12
—
9
—
8
ns
sdram_245_oe_n
Tdo11
cpu_masterclk rising
—
12
—
9
—
8
ns
sdram_245_dt_r_n
Tdoh4
cpu_masterclk rising
1
—
1
—
1
—
ns
sdram_ras_n, sdram_cas_n, sdram_we_n,
sdram_cs_n[3:0], sdram_s_n[1:0],
sdram_bemask_n[3:0] sdram_cke,
sdram_addr_12, sdram_245_oe_n
Tdoh4
cpu_masterclk rising
2.5
—
2.5
—
2.5
—
ns
DMA
dma_ready_n[1:0], dma_done_n[1:0]
Tsu7
cpu_masterclk rising
9
—
7
—
6
—
ns
Chapter 13,
Figure 13.4
dma_ready_n[1:0], dma_done_n[1:0]
Thld9
cpu_masterclk rising
1
—
1
—
1
—
ns
Interrupt Handling
cpu_int_n[5:4], cpu_int_n[2:0], cpu_nmi_n
Tsu9
cpu_masterclk rising
9
—
9
—
6
—
ns
Chapter 14,
Figure 14.12
cpu_int_n[5:4], cpu_int_n[2:0], cpu_nmi_n
Thld13
cpu_masterclk rising
1
—
1
—
1
—
ns
PIO
PIO[15:0]
Tsu7
cpu_masterclk rising
9
—
7
—
6
—
ns
PIO[15:0]
Thld9
cpu_masterclk rising
1
—
1
—
1
—
ns
Chapter 15,
Figures 15.9
and 15.10
PIO[15:10], PIO[8:0]
Tdo16
cpu_masterclk rising
—
15
—
12
—
10
ns
PIO[9]
Tdo19
cpu_masterclk rising
—
15
—
12
—
10
ns
PIO[15:10], PIO[8:0]
Tdoh7
cpu_masterclk rising
1
—
1
—
1
—
ns
PIO[9]
Tdoh7
cpu_masterclk rising
1
—
1
—
1
—
ns
Timer
timer_tc_n[0], timer_gate_n[0]
Tsu8
cpu_masterclk rising
9
—
7
—
6
—
ns
timer_tc_n[0], timer_gate_n[0]
Thld10
cpu_masterclk rising
1
—
1
—
1
—
ns
Chapter 16,
Figures 16.6
and 16.7
timer_tc_n[0], timer_gate_n[0]
Tdo15
cpu_masterclk rising
—
15
—
12
—
10
ns
timer_tc_n[0], timer_gate_n[0]
Tdoh6
cpu_masterclk rising
1
—
1
—
1
—
ns
Signal
Symbol
Reference
Edge
RC32334
1
100MHz
RC32334
1
133MHz
RC32334
1
150MHz
Unit
User
Manual
Timing
Diagram
Reference
Min
Max
Min
Max
Min
Max
Table 6 AC Timing Characteristics - RC32334 (Part 2 of 4)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32334-133BBG | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | IDT Interprise Integrated Communications Processor |
| 79RC32334-150BB | IDT Interprise Integrated Communications Processor |
| 79RC32351 | IDT Interprise Integrated Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32334-133BBG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-133BBI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-150BB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32334-150BBG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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