參數(shù)資料
型號(hào)： 79RC32334-133BBG
廠(chǎng)商： Integrated Device Technology, Inc.
英文描述： IDT Interprise Integrated Communications Processor
中文描述： IDT的洽談會(huì)集成通信處理器
文件頁(yè)數(shù)： 17/30頁(yè)
文件大小： 467K
代理商： 79RC32334-133BBG
17 of 30
August 31, 2004
IDT 79RC32334—Rev. Y
UARTs
uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
Tsu7
cpu_masterclk rising
15
—
12
—
10
—
ns
Chapter 17,
Figure 17.16
uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
Thld9
cpu_masterclk rising
15
—
12
—
10
—
ns
uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
Tdo16
cpu_masterclk rising
—
15
—
12
—
10
ns
uart_rx[1:0], uart_tx[1:0], uart_cts_n[0],
uart_dsr_n[0], uart_dtr_n[0], uart_rts_n[0]
Tdoh8
cpu_masterclk rising
1
—
1
—
1
—
ns
SPI Interface
spi_clk, spi_mosi, spi_miso
Tsu7
cpu_masterclk rising
15
—
12
—
10
—
ns
Chapter 18,
Figures 18.8
and 18.9
spi_clk, spi_mosi, spi_miso
Thld9
cpu_masterclk rising
15
—
12
—
10
—
ns
spi_clk, spi_mosi, spi_miso
Tdo16
cpu_masterclk rising
—
15
—
12
—
10
ns
spi_clk, spi_mosi, spi_miso
Tdoh8
cpu_masterclk rising
1
—
1
—
1
—
ns
Reset
mem_addr[19:17]
Tsu10
cpu_coldreset_n rising
10
—
10
—
10
—
ms
Chapter 19
Figures 19.8
and 19.9
mem_addr[19:17]
Thld10
cpu_coldreset_n rising
1
—
1
—
1
—
ns
mem_addr[22:20],
Tsu22
cpu_masterclk rising
9
—
7
—
6
—
ns
mem_addr[22:20]
Thld22
cpu_masterclk rising
1
—
1
—
1
—
ns
Debug Interface
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n,
ejtag_pcst[2:0]
Tsu20
cpu_coldreset_n rising
10
—
10
—
10
—
ms
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n,
ejtag_pcst[2:0]
Thld20
cpu_coldreset_n rising
1
—
1
—
1
—
ns
Chapter 19,
Figure 19.9 and
Chapter 9,
Figure 9.2
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n
Tdo20
cpu_masterclk rising
—
15
—
12
—
10
ns
debug_cpu_dma_n, debug_cpu_ack_n,
debug_cpu_ads_n, debug_cpu_i_d_n
Tdoh20
cpu_masterclk rising
1
—
1
—
1
—
ns
JTAG Interface
jtag_tms, jtag_tdi, jtag_trst_n
t
5
t
6
jtag_tck rising
10
—
10
—
10
—
ns
See Figure 4
below.
jtag_tms, jtag_tdi, jtag_trst_n
jtag_tck rising
10
—
10
—
10
—
ns
jtag_tdo
t
4
Table 6 AC Timing Characteristics - RC32334 (Part 3 of 4)
jtag_tck falling
—
10
—
10
—
10
ns
Signal
Symbol
Reference
Edge
RC32334
1
100MHz
RC32334
1
133MHz
RC32334
1
150MHz
Unit
User
Manual
Timing
Diagram
Reference
Min
Max
Min
Max
Min
Max
相關(guān)PDF資料
PDF描述
79RC32334-133BBGI IDT Interprise Integrated Communications Processor
79RC32334-133BBI IDT Interprise Integrated Communications Processor
79RC32334-150BB IDT Interprise Integrated Communications Processor
79RC32351 IDT Interprise Integrated Communications Processor
79RC32351-100DH IDT Interprise Integrated Communications Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
79RC32334-133BBGI 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-133BBI 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-150BB 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-150BBG 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
79RC32334-150BBGI 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor
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