IDT MIPS32 4Kc Processor Core
CP0 Registers
79RC32438 User Reference Manual
2 - 78
November 4, 2002
Notes
DataLo Register (CP0 Register 28, Select 1)
The DataLo register acts as the interface to the cache data array. The Index Load Tag operation of the
CACHE instruction reads the corresponding data values into the DataLo register. This register was made
writeable on revision 3.5 and the Index Store Data operation of the CACHE instruction was added. This
operation will write the cache data array with the value of this register.
DataLo Register Format
31
ErrorEPC (CP0 Register 30, Select 0)
The ErrorEPC register is a read-write register, similar to the EPC register, except that ErrorEPC is used
on error exceptions. All bits of the ErrorEPC register are significant and must be writable. It is also used to
store the program counter on Reset, Soft Reset, and non-maskable interrupt (NMI) exceptions.
The ErrorEPC register contains the virtual address at which instruction processing can resume after
servicing an error. This address can be:
–
The virtual address of the instruction that caused the exception
–
The virtual address of the immediately preceding branch or jump instruction when the error
causing instruction is in a branch delay slot.
Unlike the EPC register, there is no corresponding branch delay slot indication for the ErrorEPC register.
ErrorEPC Register Format
31
DeSave Register (CP0 Register 31)
The Debug Exception Save (DeSave) register is a read/write register that functions as a simple memory
location. This register is used by the debug exception handler to save one of the GPRs that is then used to
save the rest of the context to a pre-determined memory area (such as in the EJTAG Probe). This register
allows the safe debugging of exception handlers and other types of code where the existence of a valid
stack for context saving cannot be assumed.
DeSave Register Format
31
0
DATA
Fields
Description
Read/
Write
Reset
State
Name
Bit(s)
DATA
31:0
Low-order data read from the cache data array.
R/W
Undefined
Table 2.54 DataLo Register Field Descriptions
0
ErrorEPC
Fields
Description
Read/
Write
Reset
State
Name
Bit(s)
ErrorEPC
31:0
Error Exception Program Counter
R/W
Undefined
Table 2.55 ErrorEPC Register Field Descriptions
0
DESAVE