參數(shù)資料
型號(hào): 80960CF-40
廠商: Intel Corp.
英文描述: 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標(biāo)量嵌入式微處理器)
中文描述: 32位高性能嵌入式微處理器超標(biāo)量(32位高性能超標(biāo)量嵌入式微處理器)
文件頁(yè)數(shù): 45/77頁(yè)
文件大小: 927K
代理商: 80960CF-40
PRELIMINARY
39
A
80960CF-40, -33, -25, -16
Figure 12. NMI, XINT7:0 Input Setup and Hold Waveform
Figure 13. Hold Acknowledge Timings
PCLK2:1
1.5 V
1.5 V
1.5 V
Valid
T
IS
T
IH
NMI, XINT7:0
Min
Min
F_CX013A
1.5 V
1.5 V
PCLK2:1
1.5 V
1.5 V
1.5 V
Outputs:
A31:2, D31:0, BE3:0,
ADS, BLAST, WAIT, W/R,
DT/R, DEN, LOCK,
D/C, SUP, DMA
Min
Max
Min
Max
Valid
1.5 V Valid
T
OF
T
OV
HOLD
T
IS
Min
T
IH
Min
1.5 V
1.5 V
T
IH
Min
T
IS
Min
HOLDA
T
OV
Max
Min
Max
Min
F_CX014A
1.5 V
1.5 V
1.5 V
NOTES:
1. T
OV
T
OH
- OUTPUT DELAY - Maximum output delay is referred to as Output Valid Delay (T
OV
); minimum
output delay is referred to as Output Hold (T
OH
).
2. T
- OUTPUT FLOAT DELAY - Output float condition occurs when the maximum output current becomes less that I
LO
in
magnitude.
3. T
T
- INPUT SETUP AND HOLD - The input setup and hold requirements specify the sampling window during which
synchronous inputs must be stable for correct processor operation.
1.5 V
T
OV
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