參數(shù)資料
型號: 82C37
廠商: Intersil Corporation
英文描述: IDT INTEGRATED COMM PROCESSOR 32-BIT, 350MHZ
中文描述: 高性能的CMOS可編程DMA控制器
文件頁數(shù): 18/23頁
文件大?。?/td> 204K
代理商: 82C37
4-209
82C37A
Timing Waveforms
FIGURE 8. SLAVE MODE WRITE
NOTE:
Successive WRITE accesses to the 82C37A must allow at least TCY as recovery time between accesses. A TCY recovery time must
be allowed before executing a WRITE access after a READ access.
FIGURE 9. SLAVE MODE READ
NOTE:
Successive READ accesses to the 82C37A must allow at least TCY as recovery time between accesses. A TCY recovery time must
be allowed before executing a READ access after a WRITE access.
CS
A0 - A3
IOW
DB0 - DB7
INPUT VALID
INPUT VALID
TWWS
(55)
TDW
(44)
TCWL
(43)
TAWL
(42)
TWC (53)
TWA (52)
TWD (54)
CS
A0 - A3
IOR
DB0 -DB7
ADDRESS MUST BE VALID
TAR
(41)
TRDE
(46)
TRDF
(47)
TRA (45)
TRW
(51)
DATA OUT VALID
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