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參數(shù)資料
| 型號(hào)： | 82C37 |
| 廠商： | Intersil Corporation |
| 英文描述： | IDT INTEGRATED COMM PROCESSOR 32-BIT, 350MHZ |
| 中文描述： | 高性能的CMOS可編程DMA控制器 |
| 文件頁數(shù)： | 20/23頁 |
| 文件大?。?/td> | 204K |
| 代理商： | 82C37 |
4-211
82C37A
FIGURE 11. MEMORY-TO-MEMORY TRANSFER
FIGURE 12. READY
NOTE: READY must not transition during the specified setup and hold times.
Timing Waveforms
(Continued)
S0
(33)
TCLSH
CLK
S11
S12
S13
S14
S21
S22
S23
S24
S11/SI
ADSTB
A0-A7
DB0-DB7
MEMR
MEMW
EOP
EXT EOP
(34)
TCLSL
(7)
TAHS
TFAAB (22)
TASS (11)
TFADB (24)
(5) TAFDB
IN
A8-A15
(16) TDCTR
TFAC (23)
TFAC (23)
ADDRESS VALID
ADDRESS VALID
TAFDB
(5)
(33)
TCLSH
(34)
TCLSL
TWHSH
(60)
TCLSH
(33)
TAFAB
(3)
TAFC
(4)
TAFC
(4)
(59) TRHSH
TAHS
(7)
A8-A15
(24)
TFADB
TIDH (26)
TIDS
(27)
TDCL
(15)
TDCL
(15)
TDCTW (17)
TAK
(9)
TAK
(9)
OUT
TEPW
(21)
TEPS (20)
(19) TEPH
EXTENDED WRITE
TOVD
(29)
TODH (28)
TAZRL
(64)
TDCL
(15)
TASS
(11)
CLK
EXTENDED WRITE
(16)
TDCTR
S4
SW
SW
S3
S2
(15)
TDCL
(15)
TDCL
(15)TDCL
(31)TRH
(32)TRS
TRH
(32)TRS
(17)
TDCTW
READ
WRITE
READY
(31)
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