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參數(shù)資料
| 型號： | 82C51A |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER |
| 中文描述： | 通用同步異步收發(fā)器 |
| 文件頁數(shù)： | 4/26頁 |
| 文件大?。?/td> | 203K |
| 代理商： | 82C51A |
4/26
Semiconductor
MSM82C51A-2RS/GS/JS
FUNCTION
Outline
The MSM82C51A-2's functional configuration is programed by software.
Operation between the MSM82C51A-2 and a CPU is executed by program control. Table 1
shows the operation between a CPU and the device.
0
0
0
0
Data Bus 3-State
Status
CPU
Control Word
¨
CPU
Data
CPU
1
Data Bus 3-State
CS
￥
1
1
0
￥
C/
D
1
1
0
1
￥
0
Data
¨
CPU
0
0
WR
1
0
1
0
￥
1
RD
Table 1 Operation between MSM82C51A and CPU
It is necessary to execute a function-setting sequence after resetting the MSM82C51A-2. Fig. 1
shows the function-setting sequence.
If the function was set, the device is ready to receive a command, thus enabling the transfer of
data by setting a necessary command, reading a status and reading/writing data.
Asynchronous
External Reset
Internal Reset
Write Mode Instruction
Write First Sync
Charactor
yes
no
Single
Sync Mode
Write Second Sync
Charactor
yes
no
End of Mode Setting
Fig. 1 Function-setting Sequence (Mode Instruction Sequence)
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