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參數(shù)資料
| 型號： | 85408BGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 85408 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封裝： | 4.40 X 7.80 MM, 0.925 MM HEIGHT, MO-153, TSSOP-24 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 755K |
| 代理商： | 85408BGI |
ICS85408I Datasheet
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
ICS85408BGI REVISION B JULY 2, 2009
6
2009 Integrated Device Technology, Inc.
Additive Phase Jitter
The spectral purity in a band at a specific offset from the fundamental
compared to the power of the fundamental is called the dBc Phase
Noise. This value is normally expressed using a Phase noise plot
and is most often the specified plot in many applications. Phase noise
is defined as the ratio of the noise power present in a 1Hz band at a
specified offset from the fundamental frequency to the power value of
the fundamental. This ratio is expressed in decibels (dBm) or a ratio
of the power in the 1Hz band to the power in the fundamental. When
the required offset is specified, the phase noise is called a dBc value,
which simply means dBm at a specified offset from the fundamental.
By investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the entire
time record of the signal. It is mathematically possible to calculate an
expected bit error rate given a phase noise plot.
As with most timing specifications, phase noise measurements has
issues relating to the limitations of the equipment. Often the noise
floor of the equipment is higher than the noise floor of the device. This
is illustrated above. The device meets the noise floor of what is
shown, but can actually be lower. The phase noise is dependent on
the input source and measurement equipment.
SSB
Phas
e
Noise
dBc/Hz
Offset from Carrier Frequency (Hz)
Additive Phase Jitter @156.25MHz
12kHz – 20MHz = 167fs (typical)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 85408BGILF | 功能描述:時鐘緩沖器 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 85408BGILF-HT | 制造商:Integrated Device Technology Inc 功能描述:CLOCK BFFR 16-OUT 24TSSOP - Rail/Tube |
| 85408BGILFT | 功能描述:時鐘驅(qū)動器及分配 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 85408BGIT | 制造商:Integrated Device Technology Inc 功能描述:85408BGIT - Tape and Reel |
| 85408BGLF | 功能描述:時鐘緩沖器 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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