- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄298596 > 85408BGI (INTEGRATED DEVICE TECHNOLOGY INC) 85408 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 PDF資料下載
參數(shù)資料
| 型號(hào)： | 85408BGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 85408 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| 封裝： | 4.40 X 7.80 MM, 0.925 MM HEIGHT, MO-153, TSSOP-24 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大小： | 755K |
| 代理商： | 85408BGI |
ICS85408I Datasheet
LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
ICS85408BGI REVISION B JULY 2, 2009
9
2009 Integrated Device Technology, Inc.
Application Information
Wiring the Differential Input to Accept Single-Ended Levels
Figure 1 shows how the differential input can be wired to accept
single-ended levels. The reference voltage V_REF = VDD/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to position the V_REF in the
center of the input voltage swing. For example, if the input clock swing
is only 2.5V and VDD = 3.3V, V_REF should be 1.25V and R2/R1 =
0.609.
Figure 1. Single-Ended Signal Driving Differential Input
Recommendations for Unused Output Pins
Outputs:
LVDS Outputs
All unused LVDS output pairs can be either left floating or terminated
with 100
across. If they are left floating, there should be no trace
attached.
V_REF
Single Ended Clock Input
VDD
CLK
nCLK
R1
1K
C1
0.1u
R2
1K
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 85411AMILFT | 85411 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 85424-001 | 12 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT, RECEPTACLE |
| 8545AGI-02LF | 8545 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 85460-001 | 12 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT, RECEPTACLE |
| 85460-011 | 12 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT, RECEPTACLE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 85408BGILF | 功能描述:時(shí)鐘緩沖器 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 85408BGILF-HT | 制造商:Integrated Device Technology Inc 功能描述:CLOCK BFFR 16-OUT 24TSSOP - Rail/Tube |
| 85408BGILFT | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 85408BGIT | 制造商:Integrated Device Technology Inc 功能描述:85408BGIT - Tape and Reel |
| 85408BGLF | 功能描述:時(shí)鐘緩沖器 Low Skew 1-to-8 Diff to LVDS Clock Dist RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。