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參數(shù)資料
| 型號： | 935047940623 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 123K |
| 代理商： | 935047940623 |
Philips Semiconductors
Product data
74ABT648
Octal bus transceiver/register, inverting (3-State)
2002 Dec 13
7
AC CHARACTERISTICS
GND = 0 V, tR = tF = 2.5 ns, CL = 50 pF, RL = 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25 °C
VCC = +5.0 V
Tamb = –40 °C to +85 °C
VCC = +5.0 V ±0.5 V
UNIT
Min
Typ
Max
Min
Max
fMAX
Maximum clock frequency
1
125
200
125
MHz
tPLH
tPHL
Propagation delay
CPAB to Bn or CPBA to An
1
2.2
1.7
5.3
5.9
6.8
7.4
2.2
1.7
7.8
8.4
ns
tPLH
tPHL
Propagation delay
An to Bn or Bn to An
2
3
1.0
1.5
3.6
4.2
5.1
5.6
1.0
1.5
6.1
6.3
ns
tPLH
tPHL
Propagation delay
SAB to Bn or SBA to An
2
3
1.5
4.9
5.4
6.1
6.9
1.5
7.1
7.7
ns
tPZH
tPZL
Output enable time
OE to An or Bn
5
6
1.0
2.1
4.3
5.5
5.3
7.4
1.0
2.1
6.3
8.8
ns
tPHZ
tPLZ
Output disable time
OE to An or Bn
5
6
1.5
6.2
6.0
7.3
7.0
1.5
8.3
7.5
ns
tPZH
tPZL
Output enable time
DIR to An or Bn
5
6
1.2
2.5
4.8
6.0
5.7
9.0
1.2
2.5
6.7
9.5
ns
tPHZ
tPLZ
Output disable time
DIR to An or Bn
5
6
1.5
5.9
6.3
6.7
7.2
1.5
7.7
8.2
ns
AC SET-UP REQUIREMENTS
GND = 0 V, tR = tF = 2.5 ns, CL = 50 pF, RL = 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25 °C
VCC = +5.0 V
Tamb = -40 °C to +85 °C
VCC = +5.0 V ±0.5 V
UNIT
Min
Typ
Min
ts(H)
ts(L)
Set-up time
An to CPAB, Bn to CPBA
4
3.0
1.5
1.0
3.0
ns
th(H)
th(L)
Hold time
An to CPAB, Bn to CPBA
4
0.0
–0.4
–1.0
0.0
ns
tw(H)
tw(L)
Pulse width, High or Low
CPAB or CPBA
1
3.5
4.0
2.6
1.0
3.5
4.0
ns
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