1997 Apr 02
3
Philips Semiconductors
Product specication
2048
× 8-bit CMOS EEPROM with I2C-bus
interface
PCF85116-3
1
FEATURES
Low power CMOS:
– maximum operating current 1.0 mA
– maximum standby current 10
A (at 5.5 V),
typical 4
A
Non-volatile storage of 16 kbits organized as eight
blocks of 256
× 8-bit each
Single supply with full operation down to 2.7 V
On-chip voltage multiplier
Serial input/output I2C-bus (100 kbits/s standard-mode
and 400 kbits/s fast-mode)
Write operations: multi byte write mode up to 32 bytes
Write-protection input
Read operations:
– sequential read
– random read
Internal timer for writing (no external components)
Power-on-reset
High reliability by using redundant EEPROM cells
Endurance: 1000000 Erase/Write (E/W) cycles at
Tamb =22 °C
20 years non-volatile data retention time (minimum)
Pin and address compatible to the PCx85xxC-2 family
(see also Section 2.1)
2 kV ESD protection (Human Body model).
2
DESCRIPTION
The PCF85116-3 is an 16 kbits (2048
× 8-bit) floating gate
Electrically Erasable Programmable Read Only Memory
(EEPROM). By using redundant EEPROM cells it is fault
tolerant to single bit errors. In most cases multi bit errors
are also covered. This feature dramatically increases
reliability compared to conventional EEPROM memories.
Power consumption is low due to the full CMOS
technology used. The programming voltage is generated
on-chip, using a voltage multiplier.
As data bytes are received and transmitted via the serial
I2C-bus, a package using eight pins is sufficient. Only one
PCF85116-3 device is required to support all eight blocks
of 256
× 8-bit each.
Timing of the E/W cycle is carried out internally, thus no
external components are required. A write-protection input
at pin 7 (WP) allows disabling of write-commands from the
master by a hardware signal. When pin 7 is HIGH the data
bytes received will not be acknowledged by the
PCF85116-3 and the EEPROM contents are not changed.
2.1
Remark
The PCF85116-3 is pin and address compatible to the
PCx85xxC-2 family. The PCF85116-3 covers the whole
address space of 16 kbits; address inputs are no longer
needed. Therefore, pins 1 to 3 are not connected.
The write-protection input is at pin 7.
3
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDD
supply voltage
2.7
5.5
V
IDDR
supply current read
fSCL = 400 kHz; VDD = 5.5 V
1.0
mA
IDDW
supply current E/W
fSCL = 400 kHz; VDD = 5.5 V
1.0
mA
Istb
standby supply current
VDD = 2.7 V
6
A
VDD = 5.5 V
10
A