2000 Jan 04
33
Philips Semiconductors
Product specication
Stand-alone CAN controller
SJA1000
Note
1. The receive interrupt enable bit has direct influence to the receive interrupt bit and the external interrupt output INT.
If RIE is cleared, the external INT pin will become HIGH immediately, if there is no other interrupt pending.
6.4.8
ARBITRATION LOST CAPTURE REGISTER (ALC)
This register contains information about the bit position of losing arbitration. The arbitration lost capture register appears
to the CPU as a read only memory. Reserved bits are read as logic 0.
Table 17 Bit interpretation of the arbitration lost capture register (ALC); CAN address 11
On arbitration lost, the corresponding arbitration lost interrupt is forced, if enabled. At the same time, the current bit
position of the bit stream processor is captured into the arbitration lost capture register. The content within this register
is fixed until the users software has read out its contents once. The capture mechanism is then activated again.
The corresponding interrupt flag located in the interrupt register is cleared during the read access to the interrupt register.
A new arbitration lost interrupt is not possible until the arbitration lost capture register is read out once.
BIT
SYMBOL
NAME
VALUE
FUNCTION
ALC.7 to
ALC.5
reserved
For value and function see Table 18
ALC.4
BITNO4
bit number 4
ALC.3
BITNO3
bit number 3
ALC.2
BITNO2
bit number 2
ALC.1
BITNO1
bit number 1
ALC.0
BITNO0
bit number 0
Fig.5 Arbitration lost bit number interpretation.
handbook, full pagewidth
MGK619
ID.28 ID.27 ID.26 ID.25 ID.24 ID.23 ID.22 ID.21 ID.20 ID.19 ID.18 SRTR IDE
00
standard frame and
extended frame messages
extended frame
messages
01
02
03
04
05
06
07
08
09
10
11
12
ID.16 ID.15 ID.14 ID.13 ID.12 ID.11 ID.10 ID.9
ID.8
ID.7
ID.6
ID.5
ID.4
14
ID.17
13
start of frame
15
16
17
18
19
20
21
22
23
24
25
26
ID.3
ID.2
ID.1
ID.0
RTR
27
28
29
30
31