參數(shù)資料
型號： 935247890557
廠商： NXP SEMICONDUCTORS
元件分類： 畫面疊加
英文描述： PICTURE-IN-PICTURE IC, PQFP100
封裝： PLASTIC, SOT-317-2, QFP-100
文件頁數(shù)： 32/35頁
文件大小： 228K
代理商： 935247890557
1996 Aug 07
6
Philips Semiconductors
Preliminary specication
Picture-In-Picture (PIP) controller
SAB9077H
DCVSSD
41
I/O
E009
digital ground for display-clock buffer
DCVDDD
42
I/O
E030
digital positive power supply for display-clock buffer
DVDDD
43
I/O
E030
digital positive power supply for display core
DVSSD
44
I/O
E009
digital ground for display core
VSSD
45
I/O
E009
digital ground for peripherals
VDDD
46
I/O
E030
digital positive power supply for peripherals
WE
47
O
OPF20
memory write enable output; active LOW
CAS
48
O
OPF20
memory column address strobe output; active LOW
RAS
49
O
OPF20
memory row address strobe output; active LOW
AD8
50
O
OPF20
memory address bus output; bit 8
AD0
51
O
OPF20
memory address bus output; bit 0
AD7
52
O
OPF20
memory address bus output; bit 7
AD1
53
O
OPF20
memory address bus output; bit 1
AD6
54
O
OPF20
memory address bus output; bit 6
AD2
55
O
OPF20
memory address bus output; bit 2
AD5
56
O
OPF20
memory address bus output; bit 5
AD3
57
O
OPF20
memory address bus output; bit 3
AD4
58
O
OPF20
memory address bus output; bit 4
A0
59
I
HPF01
I2C-bus address 0 selection input
SCL
60
I
HPP01
shift clock input for I2C-bus
SDA
61
I/O
IOI41
shift I2C-bus input data; acknowledge I2C-bus output data
POR
62
I
HUP07
power-on reset input
TACLK
63
I
HPP01
test clock for acquisition
SVsync
64
I
HPP01
vertical synchronization input for sub-channel
SCVSSD
65
I/O
E009
digital ground for sub-clock buffer
SCVDDD
66
I/O
E030
digital positive power supply for sub-clock buffer
SVDDD
67
I/O
E030
digital positive power supply for sub-channel core
SVSSD
68
I/O
E009
digital ground for sub-channel core
SAVSSA
69
I/O
E009
analog ground for sub-channel ADCs
SAVDDA
70
I/O
E030
analog positive power supply for sub-channel ADCs
SY
71
I
E027
analog Y input for sub-channel
SAVrefB
72
I
E027
analog bottom reference voltage for sub-channel ADCs
SV
73
I
E027
analog V input for sub-channel
SAVrefT
74
I
E027
analog top reference voltage for sub-channel ADCs
SU
75
I
E027
analog U input for sub-channel
SAVbias
76
I/O
E027
analog bias reference for sub-channel ADCs
SAVDDD
77
I/O
E030
digital positive power supply for sub-channel ADCs and PLLs
SAVSSD
78
I/O
E009
digital ground for sub-channel ADCs and PLLs
SPHsync
79
I
HPP01
horizontal synchronization input for sub-channel
SPVbias
80
I/O
E027
analog bias reference for sub-channel
SPVSSA
81
I/O
E009
analog ground for sub-channel PLL
SYMBOL
PIN
I/O
TYPE
DESCRIPTION
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