1996 Jul 08
19
Philips Semiconductors
Preliminary specication
Digital Video Encoder (EURO-DENC)
SAA7182; SAA7183
Table 19 Subaddress 67 to 6A
Note
1. LSBs of the respective bytes are encoded immediately after run-in and framing code, the MSBs of the respective
bytes have to carry the parity bit, in accordance with the denition of Line 21 encoding format.
Table 20 Subaddress 6B
DATA BYTE(1)
DESCRIPTION
L21O0
rst byte of captioning data, odd eld
L21O1
second byte of captioning data, odd eld
L21E0
rst byte of extended data, even eld
L21E1
second byte of extended data, even eld
DATA BYTE
LOGIC LEVEL
DESCRIPTION
PRCV2
0
polarity of RCV2 as output is active HIGH, rising edge is taken when input; default
after reset
1
polarity of RCV2 as output is active LOW, falling edge is taken when input
ORCV2
0
pin RCV2 is switched to input; default after reset
1
pin RCV2 is switched to output
CBLF
0
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference Pulse
that is dened by RCV2S and RCV2E, also during vertical blanking Interval); default
after reset
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization only
(if TRCV2 = 1); default after reset
1
if ORCV2 = HIGH, pin RCV2 provides a ‘Composite-Blanking-Not’ signal, for
example a reference pulse that is dened by RCV2S and RCV2E, excluding Vertical
Blanking Interval, which is dened by FAL and LAL (PRCV2 must be LOW)
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization
(if TRCV2 = 1) and as an internal blanking signal
PRCV1
0
polarity of RCV1 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
1
polarity of RCV1 as output is active LOW, falling edge is taken when input,
respectively
ORCV1
0
pin RCV1 is switched to input; default after reset
1
pin RCV1 is switched to output
TRCV2
0
horizontal synchronization is taken from RCV1 port; default after reset
1
horizontal synchronization is taken from RCV2 port
SRCV1
denes signal type on pin RCV1; see Table 21