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參數(shù)資料
| 型號(hào)： | 935263652557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, SOT-393, QFP-64 |
| 文件頁(yè)數(shù)： | 28/75頁(yè) |
| 文件大?。?/td> | 479K |
| 代理商： | 935263652557 |
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1998 May 15
34
Philips Semiconductors
Product specication
Enhanced Video Input Processor (EVIP)
SAA7111A
Table 3
Digital output control
Note
1. Only active in 656-format (OFTS = 3).
OEYC
FEI
TCLO(1)
VPO
15 to 8
VPO
7to0
000
Z
1
0
active
010
Z
110
Z
001
Z
1
0
1
active
Z
011
Z
111
Z
14 CLOCK SYSTEM
14.1
Clock generation circuit
The internal CGC generates the system clocks LLC, LLC2
and the clock reference signal CREF. The internally
generated LFCO (triangular waveform) is multiplied by 4
via the analog PLL (including phase detector, loop filter,
VCO and frequency divider). The rectangular output
signals have a 50% duty factor.
Table 4
Clock frequencies
CLOCK
FREQUENCY (MHz)
XTAL
24.576
LLC
27
LLC2
13.5
LLC4
6.75
LLC8
3.375
Fig.26 Block diagram of clock generation circuit.
handbook, full pagewidth
BAND PASS
FC = LLC/4
ZERO
CROSS
DETECTION
PHASE
DETECTION
LOOP
FILTER
DIVIDER
1/2
DIVIDER
1/2
OSCILLATOR
DELAY
CREF
MGC632
LLC2
LLC
LFCO
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