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參數(shù)資料
| 型號： | 935285129118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | LED DISPLAY DRIVER, PDSO28 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT361-1, TSSOP-28 |
| 文件頁數(shù)： | 19/54頁 |
| 文件大小： | 410K |
| 代理商： | 935285129118 |
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PCA9685_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 July 2009
26 of 50
NXP Semiconductors
PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
7.4 Active LOW output enable input
The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at
the same time.
When a LOW level is applied to OE pin, all the LED outputs are enabled and follow the
output state dened in the LEDn_ON and LEDn_OFF registers with the polarity
dened by INVRT bit (MODE2 register).
When a HIGH level is applied to OE pin, all the LED outputs are programmed to the
value that is dened by OUTNE[1:0] in the MODE2 register.
The OE pin can be used as a synchronization signal to switch on/off several PCA9685
devices at the same time. This requires an external clock reference that provides blinking
period and the duty cycle.
The OE pin can also be used as an external dimming control signal. The frequency of the
external clock must be high enough not to be seen by the human eye, and the duty cycle
value determines the brightness of the LEDs.
7.5 Power-on reset
When power is applied to VDD, an internal power-on reset holds the PCA9685 in a reset
condition until VDD has reached VPOR. At this point, the reset condition is released and the
PCA9685 registers and I2C-bus state machine are initialized to their default states.
Thereafter, VDD must be lowered below 0.2 V to reset the device.
Table 10.
LED outputs when OE=1
OUTNE1
OUTNE0
LED outputs
000
0
1
1 if OUTDRV = 1, high-impedance if OUTDRV = 0
1
0
high-impedance
1
high-impedance
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