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參數(shù)資料
| 型號： | 935287058118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | LED DISPLAY DRIVER, PQCC28 |
| 封裝： | 6 X 6 MM, 0.85 MM HIGHT, PLASTIC, MO-220, SOT788-1, HVQFN-28 |
| 文件頁數(shù)： | 22/54頁 |
| 文件大?。?/td> | 410K |
| 代理商： | 935287058118 |
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PCA9685_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 July 2009
29 of 50
NXP Semiconductors
PCA9685
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
8.
Characteristics of the I2C-bus
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
8.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 16).
8.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is dened as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is dened as the STOP
condition (P) (see Figure 17).
8.2 System conguration
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see Figure 18).
Fig 16. Bit transfer
mba607
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig 17. Denition of START and STOP conditions
mba608
SDA
SCL
P
STOP condition
S
START condition
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