參數(shù)資料
型號(hào): 94SA108X0016HBP
廠商: Texas Instruments, Inc.
英文描述: 60-A, 3.3/5-V INPUT, NONISOLATED WIDE-OUTPUT ADJUST POWER MODULE
中文描述: 60甲,3.3/5-V輸入,非隔離寬輸出調(diào)節(jié)電源模塊
文件頁(yè)數(shù): 18/24頁(yè)
文件大小: 947K
代理商: 94SA108X0016HBP
www.ti.com
ELECTRICAL CHARACTERISTICS
PTH04040W
SLTS238A – SEPTEMBER 2005 – REVISED FEBRUARY 2006
T
A = 25°C, VI = 5 V, VO = 2.5 V, CI = 1000 F, CO = 660 F, and IO = IOmax (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IO
Output current
60
°C, 200 LFM airflow
0
60(1)
A
VI
Input voltage range
Over IO range
2.95(2)
5.5
V
VOtol
Set-point voltage tolerance
±2(3)
%VO
Reg
temp
Temperature variation
–40
°C < T
A < 85°C
±0.5
%VO
Reg
line
Line regulation
Over VI range
±5
mV
Reg
load
Load regulation
Over IO range
±5
mV
Reg
tot
Total output variation
Includes set-point, line, load, –40
°C ≤ T
A ≤ 85°C
±3(3)
%VO
2.95
≤ V
I ≤ 4.5 V
(3)
0.8
-
1.65
VO, ADJ
Output adjust range
V
4.5
≤ V
I ≤ 5.5 V
(3)
0.8
-
2.5
RSET = 2.21 k, VO = 2.5 V
93%
RSET = 5.49 k, VO = 1.8 V
90%
VI = 5 V, IO = 45 A
RSET = 8.87 k, VO = 1.5 V
88%
η
Efficiency
RSET = 17.4 k, VO = 1.2 V
86%
RSET = 6.92 k, VO = 1.65 V
92%
VI = 3.3 V, IO = 45 A
RSET = 8.87 k, VO = 1.5 V
91%
RSET = 36.5 k, VO = 1 V
87%
VR
VO ripple (peak-to-peak)
20-MHz bandwidth
All voltages
15
mVPP
IOtrip
Overcurrent threshold
Reset, followed by auto-recovery
90
A
Transient response
1 A/s load step, 50 to 100% IOmax, CO = 660 F
trr
Recovery time
100
S
V
tr
VO over/undershoot
200
mV
Margin up down adjust
From a given set-point voltage
±5%
%
IILmargin
Margin input current
Pin to GND
–8(4)
A
IILtrack
Track input current (pin 18)
Pin to GND
–0.11(5)
mA
dV/dt
Track slew rate capability
|VTRACK – VO | ≤ 50 mV and V(TRACK) < VO(nom)
1
V/ms
UVLO
Undervoltage lockout
Pin 8 open
On-threshold
2.6(6)
V
Hysterisis
0.6(6)
Inhibit control (pin 7)
Referenced to GND
VIH
Input high voltage
2.5
Open(5)
V
VIL
Input low voltage
–0.2
0.5
IILinhibit
Input low current
Pin to GND
0.5
mA
IIinh
Input standby current
Inhibit (pin 7) to GND
60
mA
f s
Switching frequency
Over VI and IO ranges
675
825
975
kHz
CI
External input capacitance
940(7)
F
(1)
See SOA curves or consult factory for appropriate derating.
(2)
The nominal input voltage must be at least 2
× V
O. Output voltage regulation is guaranteed with an input voltage within ±10% from
nominal 3.3 V or 5 V. For example, for VI = 5 V and VO = 2.5 V, the input can vary between 4.5 V and 5.5 V.
(3)
The set-point voltage tolerance is affected by the tolerance of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1%
with 100 ppm/
°C or better temperature stability.
(4)
A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.
(5)
This control pin has an internal pull-up to VI. If it is left open-circuit the module operates when input power is applied. A small,
low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do not place an external
pull-up on this pin. See the Application Information section for further guidance.
(6)
These are the default voltages. They may be adjusted using the UVLO Prog control input. See the Application Information section for
further guidance.
(7)
A minimum capacitance of 940
F is required at the input for proper operation. The capacitance must be rated for a minimum of 400
mArms of ripple current.
3
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